Ðþí  '   8      (            '  È                             "    amd,seattle-overdrive amd,seattle                                    +         *   7AMD Seattle Development Board (Overdrive)      interrupt-controller@e1101000             arm,gic-400 arm,cortex-a15-gic            =         R                        +         @   c    á             áð             á              á                   g      	           r            á                  y      v2m@e0080000              arm,gic-v2m-frame             �         c                       �   @         ¡            y            timer             arm,armv8-timer       0   g        ÿ        ÿ        ÿ      
  ÿ      pmu           arm,armv8-pmuv3       `   g                           	          
                                                 smb           simple-bus                       +             r         ²                          clk100mhz_0           fixed-clock          ½             Êõá          Úadl3clk_100mhz        clk375mhz             fixed-clock          ½             ÊZÀ         Úccpclk_375mhz         clk333mhz             fixed-clock          ½             ÊÙ-@         Úsataclk_333mhz           y         clk500mhz_0           fixed-clock          ½             ÊÍe          Úpcieclk_500mhz        clk500mhz_1           fixed-clock          ½             ÊÍe          Údmaclk_500mhz         clk250mhz_4           fixed-clock          ½             Êæ²€         Úmiscclk_250mhz           y         clk100mhz_1           fixed-clock          ½             Êõá          Úuartspiclk_100mhz            y         sata@e0300000             snps,dwc-ahci            c    à0                  g      c            í             ô      sata@e0d00000         	  disabled              snps,dwc-ahci            c    àÐ                  g      b            í             ô      i2c@e1000000            ok            snps,designware-i2c          c    á                   g      e            í         i2c@e0050000          	  disabled              snps,designware-i2c          c    à                  g      T            í         serial@e1010000           arm,pl011 arm,primecell          c    á                  g      H            í              uartclk apb_pclk          spi@e1020000            ok            arm,pl022 arm,primecell          c    á                           g      J            í         	  apb_pclk          spi@e1030000            ok            arm,pl022 arm,primecell          c    á                           g      I            í         	  apb_pclk            #                        +       sdcard@0              mmc-spi-slot             c            *1-         <  €  H        K                               g              Q            a            q            €            ”             gpio@e1040000           ok            arm,pl061 arm,primecell         ¨            c    á                  ´         g      g             =         R            í         	  apb_pclk             y         gpio@e1050000           ok            arm,pl061 arm,primecell         ¨            c    á                  ´          =         R            g      f            í         	  apb_pclk          gpio@e0020000         	  disabled              arm,pl061 arm,primecell         ¨            c    à                  ´          =         R            g      n            í         	  apb_pclk          gpio@e0030000         	  disabled              arm,pl061 arm,primecell         ¨            c    à                  ´          =         R            g      m            í         	  apb_pclk          gpio@e0080000         	  disabled              arm,pl061 arm,primecell         ¨            c    à                  ´          =         R            g      i            í         	  apb_pclk          ccp@e0100000            ok            amd,ccp-seattle-v1a          c    à                  g                    ô      pcie@f0000000             pci-host-ecam-generic                        +            R           Äpci         Ð               Ú            c    ð                  å  ø                     ø                                                                  !                                  "                                  #             ô         ²C                                T   r               ïÿ                @       @       €                                   ok        ccn@e8000000              arm,ccn-504          c    è                   g      |         kcs@e0010000          	  disabled          	    ipmi-kcs            Äipmi             c    à                  g      …                                  chosen          /smb/serial@e1010000             	compatible interrupt-parent #address-cells #size-cells model interrupt-controller #interrupt-cells reg interrupts ranges phandle msi-controller arm,msi-base-spi arm,msi-num-spis dma-ranges #clock-cells clock-frequency clock-output-names clocks dma-coherent status clock-names spi-controller num-cs spi-max-frequency voltage-ranges gpios pl022,hierarchy pl022,interface pl022,com-mode pl022,rx-level-trig pl022,tx-level-trig #gpio-cells gpio-controller device_type bus-range msi-parent interrupt-map-mask interrupt-map reg-size reg-spacing stdout-path 