Ðþí  ¨‚   8  žü   (            	†  žÄ                             +    hisilicon,hi3660-hikey960 hisilicon,hi3660                                   +         	   7HiKey960       psci              arm,psci-0.2             =smc       cpus                         +       cpu-map    cluster0       core0            D         core1            D         core2            D         core3            D            cluster1       core0            D         core1            D         core2            D         core3            D   	            cpu@0             arm,cortex-a53           Hcpu          T                 Xpsci             f   
         w               ‡  P         š                ¡            µ            Ä   n         Þ         cpu@1             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@2             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@3             arm,cortex-a53           Hcpu          T                Xpsci             f   
         w               ‡  P         š                ¡            µ            Þ         cpu@100           arm,cortex-a73           Hcpu          T                Xpsci             f            w               ‡            š               ¡            µ            Ä  &         Þ         cpu@101           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ         cpu@102           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ         cpu@103           arm,cortex-a73           Hcpu          T               Xpsci             f            w               ‡            š               ¡            µ            Þ   	      idle-states          æpsci       cpu-sleep-0           arm,idle-state            ó                     �        ,  Š        <  Ü         Þ         cluster-sleep-0           arm,idle-state            ó                    ô        ,  @        <  ¬         Þ         cpu-sleep-1           arm,idle-state            ó                     �        ,  &        <  Ü         Þ         cluster-sleep-1           arm,idle-state            ó                             ,  T        <  ¬         Þ            l2-cache0             cache            Þ   
      l2-cache1             cache            Þ            opp_table0            operating-points-v2          M         Þ      opp00           X    Äï@        _ 
®`        m “à      opp01           X    ;‹‡À        _ 5         m “à      opp02           X    S�Ò€        _ »         m “à      opp03           X    eÝE@        _ B@        m “à      opp04           X    mé5         _ Èà        m “à         opp_table1            operating-points-v2          M         Þ      opp10           X    5Ò¯À        _ 
®`        m “à      opp11           X    T²½@        _ 5         m “à      opp12           X    k–@        _ »         m “à      opp13           X    }â�         _ B@        m “à      opp14           X    ŒÉB€        _ Èà        m “à         interrupt-controller@e82b0000             arm,gic-400       @   T    è+            è+              è+@             è+`                              ~            �        ¤      	  ÿ         Þ         a53-pmu           arm,cortex-a53-pmu        0  ¤                                                ¯                  a73-pmu           arm,cortex-a73-pmu        0  ¤                                                ¯            	      timer             arm,armv8-timer                   0  ¤        ÿ        ÿ        ÿ      
  ÿ      soc           simple-bus                       +            Â   crg_ctrl@fff35000              hisilicon,hi3660-crgctrl syscon          T    ÿóP                É            Þ         crg_rst_controller            hisilicon,hi3660-reset          Ö           ã            Þ         pctrl@e8a09000            hisilicon,hi3660-pctrl syscon            T    è �                 É            Þ   M      crg_ctrl@fff34000              hisilicon,hi3660-pmuctrl syscon          T    ÿó@                É         sctrl@fff0a000            hisilicon,hi3660-sctrl syscon            T    ÿð                 É            Þ   9      iomcu@ffd7e000            hisilicon,hi3660-iomcu syscon            T    ÿ×à                É            Þ         reset             hisilicon,hi3660-reset          ã           Ö            Þ         mailbox@e896b000              hisilicon,hi3660-mbox            T    è–°                ¤       À          Á           ó            Þ         stub_clock@e896b500           hisilicon,hi3660-stub-clk            T    è–µ                É           ÿ                      Þ         timer@fff14000            arm,sp804 arm,primecell          T    ÿñ@                ¤       0          1            š                          timer1 timer2 apb_pclk        i2c@ffd71000              snps,designware-i2c          T    ÿ×                ¤       v                        +             €         š              "                  )default         7              Aokay            HLS-I2C0       i2c@ffd72000              snps,designware-i2c          T    ÿ×                 ¤       w                        +             €         š              "                  )default         7              Aokay       rt1711h@4e            richtek,rt1711h          T   N        Aokay                        ¤              )default         7      connector             usb-c-connector         HUSB-C           Ndual            Xdual            csink            r�2        ~�2†A�d        ˆ ˜–€   ports                        +       port@1           T      endpoint            š            Þ   P               port                         +       endpoint@0           T            š            Þ   O            adv7533@39          Aokay              adi,adv7533          T   9        ª      ports                        +       port@0           T          port@1           T                  i2c@fdf0c000              snps,designware-i2c          T    ýðÀ                ¤       Q                        +             €         š      7        "      x           )default         7       !      	  Adisabled          i2c@fdf0b000              snps,designware-i2c          T    ýð°                ¤      :                        +             €         š      6        "      `           )default         7   "   #        Aokay            HLS-I2C1       serial@fdf02000           arm,pl011 arm,primecell          T    ýð                 ¤       J            š      h              uartclk apb_pclk            )default         7   $   %      	  Adisabled          serial@fdf00000           arm,pl011 arm,primecell          T    ýð                 ¤       K           ¸rx tx           Â   &      &            š      9      9        uartclk apb_pclk            )default         7   '   (      	  Adisabled          serial@fdf03000           arm,pl011 arm,primecell          T    ýð0                ¤       L           ¸rx tx           Â   &      &            š      :              uartclk apb_pclk            )default         7   )   *      	  Adisabled          serial@ffd74000           arm,pl011 arm,primecell          T    ÿ×@                ¤       r            š                    uartclk apb_pclk            )default         7   +   ,        Aokay          	  HLS-UART0          serial@fdf01000           arm,pl011 arm,primecell          T    ýð                ¤       M           ¸rx tx           Â   &      &            š      ;      ;        uartclk apb_pclk            )default         7   -   .        Aokay       bluetooth             ti,wl1837-st            Ç   /               Ô -ÆÀ         serial@fdf05000           arm,pl011 arm,primecell          T    ýðP                ¤       N           ¸rx tx           Â   &      &   	         š      <      <        uartclk apb_pclk            )default         7   0   1      	  Adisabled          serial@fff32000           arm,pl011 arm,primecell          T    ÿó                 ¤       O            š      
              uartclk apb_pclk            )default         7   2   3        Aokay          	  HLS-UART1          dma@fdf30000              hisilicon,k3-dma-1.0             T    ýó                 Þ           é           ö              ÿþ        ¤       �            š      >                 hi3660_dma           Þ   &      dma-controller@e804b000           hisilicon,hisi-pcm-asp-dma-1.0           T    è°                Þ           é           ö            ¤       Ø           (asp_dma_irq       rtc@fff04000              arm,pl031 arm,primecell          T    ÿð@                ¤       .            š            	  apb_pclk          gpio@e8a0b000             arm,pl061 arm,primecell          T    è °                ¤       T            8        H           T   4                   �        ~            š            	  apb_pclk          L  ` TP901 [PMU0_SSI] [PMU1_SSI] [PMU2_SSI] [PMU0_CLKOUT] [JTAG_TCK] [JTAG_TMS]       gpio@e8a0c000             arm,pl061 arm,primecell          T    è À                ¤       U            8        H           T   4                  �        ~            š             	  apb_pclk          C  `[JTAG_TRST_N] [JTAG_TDI] [JTAG_TDO] NC NC [I2C3_SCL] [I2C3_SDA] NC        gpio@e8a0d000             arm,pl061 arm,primecell          T    è Ð                ¤       V            8        H           T   4                   �        ~            š      !      	  apb_pclk          G  `NC NC NC GPIO-J GPIO_020_HDMI_SEL GPIO-L GPIO_022_UFSBUCK_INT_N GPIO-G        gpio@e8a0e000             arm,pl061 arm,primecell          T    è à                ¤       W            8        H           T   4                   �        ~            š      "      	  apb_pclk          J  `[CSI0_MCLK] [CSI1_MCLK] NC [I2C2_SCL] [I2C2_SDA] [I2C3_SCL] [I2C3_SDA] NC         gpio@e8a0f000             arm,pl061 arm,primecell          T    è ð                ¤       X            8        H           T   4                   �        ~            š      #      	  apb_pclk          A  `NC NC PWR_BTN_N GPIO_035_PMU2_EN GPIO_036_USB_HUB_RESET NC NC NC             Þ   v      gpio@e8a10000             arm,pl061 arm,primecell          T    è¡                 ¤       Y            8        H           T   4       &            �        ~            š      $      	  apb_pclk          Q  `GPIO-H GPIO_041_HDMI_PD TP904 TP905 NC NC GPIO_046_HUB_VDD33_EN GPIO_047_PMU1_EN          gpio@e8a11000             arm,pl061 arm,primecell          T    è¡                ¤       Z            8        H           T   4       .            �        ~            š      %      	  apb_pclk          A  `NC NC NC GPIO_051_WIFI_EN GPIO-I [SD_DAT1] [SD_DAT2] [UART1_RXD]             Þ   x      gpio@e8a12000             arm,pl061 arm,primecell          T    è¡                 ¤       [            8        H           T   4       6            �        ~            š      &      	  apb_pclk          y  `[UART1_TXD] [UART0_CTS] [UART0_RTS] [UART0_RXD] [UART0_TXD] [SOC_BT_UART4_CTS_N] [SOC_BT_UART4_RTS_N] [SOC_BT_UART4_RXD]          gpio@e8a13000             arm,pl061 arm,primecell          T    è¡0                ¤       \            8        H           T   4       >            �        ~            š      '      	  apb_pclk          ?  `[SOC_BT_UART4_TXD] NC [PMU_HKADC_SSI] NC GPIO_068_SEL NC NC NC        gpio@e8a14000             arm,pl061 arm,primecell          T    è¡@                ¤       ]            8        H           T   4       F            �        ~            š      (      	  apb_pclk            `NC NC NC GPIO-K NC NC NC NC       gpio@e8a15000             arm,pl061 arm,primecell          T    è¡P                ¤       ^            8        H           T   4       N            �        ~            š      )      	  apb_pclk            `NC NC NC NC NC NC NC NC       gpio@e8a16000             arm,pl061 arm,primecell          T    è¡`                ¤       _            8        H           T   4       V            �        ~            š      *      	  apb_pclk          $  `NC [PCIE_PERST_N] NC NC NC NC NC NC          Þ   ?      gpio@e8a17000             arm,pl061 arm,primecell          T    è¡p                ¤       `            8        H            T   4       ^      4      e            �        ~            š      +      	  apb_pclk            `NC NC NC     NC       gpio@e8a18000             arm,pl061 arm,primecell          T    è¡€                ¤       a            8        H           T   4       f            �        ~            š      ,      	  apb_pclk            `NC NC NC NC NC NC NC NC       gpio@e8a19000             arm,pl061 arm,primecell          T    è¡�                ¤       b            8        H           T   4       n            �        ~            š      -      	  apb_pclk            `NC NC NC NC NC NC NC NC       gpio@e8a1a000             arm,pl061 arm,primecell          T    è¡                 ¤       c            8        H           T   4       v            �        ~            š      .      	  apb_pclk          '  `NC NC NC NC NC NC GPIO_126_BT_EN TP902           Þ   /      gpio@e8a1b000             arm,pl061 arm,primecell          T    è¡°                ¤       d            8        H            �        ~            š      /      	  apb_pclk            `              gpio@e8a1c000             arm,pl061 arm,primecell          T    è¡À                ¤       e            8        H            �        ~            š      0      	  apb_pclk            `              gpio@ff3b4000             arm,pl061 arm,primecell          T    ÿ;@                ¤       f            8        H           T   5                    �        ~            š      1      	  apb_pclk          m  `[UFS_REF_CLK] [UFS_RST_N] [SPI1_SCLK] [SPI1_DIN] [SPI1_DOUT] [SPI1_CS] GPIO_150_USER_LED1 GPIO_151_USER_LED2             Þ   >      gpio@ff3b5000             arm,pl061 arm,primecell          T    ÿ;P                ¤       g            8        H           T   5                   �        ~            š      2      	  apb_pclk            `NC NC NC NC           gpio@e8a1f000             arm,pl061 arm,primecell          T    è¡ð                ¤       h            8        H           T   6                    �        ~            š      3      	  apb_pclk          @  `[SD_CLK] [SD_CMD] [SD_DATA0] [SD_DATA1] [SD_DATA2] [SD_DATA3]         gpio@e8a20000             arm,pl061 arm,primecell          T    è¢                 ¤       i            8        H            �        ~           T   7                    š      4      	  apb_pclk          ^  `[WL_SDIO_CLK] [WL_SDIO_CMD] [WL_SDIO_DATA0] [WL_SDIO_DATA1] [WL_SDIO_DATA2] [WL_SDIO_DATA3]           gpio@fff0b000             arm,pl061 arm,primecell          T    ÿð°                ¤       j            8        H           T   8                   �        ~            š   9          	  apb_pclk          d  `[GPIO_176_PMU_PWR_HOLD] NA [SYSCLK_EN] GPIO_179_WL_WAKEUP_AP GPIO_180_HDMI_INT NA GPIO-F [I2C0_SCL]          Þ   J      gpio@fff0c000             arm,pl061 arm,primecell          T    ÿðÀ                ¤       k            8        H           T   8                   �        ~            š   9         	  apb_pclk          ^  `[I2C0_SDA] [I2C1_SCL] [I2C1_SDA] [I2C1_SCL] [I2C1_SDA] GPIO_189_USER_LED3 GPIO_190_USER_LED4             Þ   w      gpio@fff0d000             arm,pl061 arm,primecell          T    ÿðÐ                ¤       l            8        H           T   8                   �        ~            š   9         	  apb_pclk          t  `[PCM_DI] [PCM_DO] [PCM_CLK] [PCM_FS] [GPIO_196_I2S2_DI] [GPIO_197_I2S2_DO] [GPIO_198_I2S2_XCLK] [GPIO_199_I2S2_XFS]       gpio@fff0e000             arm,pl061 arm,primecell          T    ÿðà                ¤       m            8        H            T   8             8                  �        ~            š   9         	  apb_pclk          z  `NC NC GPIO_202_VBUS_TYPEC GPIO_203_SD_DET GPIO_204_PMU12_IRQ_N GPIO_205_WIFI_ACTIVE GPIO_206_USBSW_SEL GPIO_207_BT_ACTIVE            Þ   @      gpio@fff0f000             arm,pl061 arm,primecell          T    ÿðð                ¤       n            8        H           T   8                   �        ~            š   9         	  apb_pclk          L  `GPIO-A GPIO-B GPIO-C GPIO-D GPIO-E [PCIE_CLKREQ_N] [PCIE_WAKE_N] [SPI0_CLK]       gpio@fff10000             arm,pl061 arm,primecell          T    ÿñ                 ¤       o            8        H           T   8       $            �        ~            š   9         	  apb_pclk          B  `[SPI0_DIN] [SPI0_DOUT] [SPI0_CS] GPIO_219_CC_INT NC NC [PMU_INT]             Þ         gpio@fff1d000             arm,pl061 arm,primecell          T    ÿñÐ                ¤       �            8        H            �        ~            š   9         	  apb_pclk            `              spi@ffd68000              arm,pl022 arm,primecell          T    ÿÖ€                             +            ¤       t            š            	  apb_pclk            )default         7   :   ;        p           w                  Aokay            HLS-SPI0       spi@ff3b3000              arm,pl022 arm,primecell          T    ÿ;0                             +            ¤      8            š      5      	  apb_pclk            )default         7   <   =        p           w   >               Aokay            HHS-SPI1       pcie@f4000000             hisilicon,kirin960-pcie       @   T    ô              ÿ?à            óò             õ                   €dbi apb phy config          Š                            +            Hpci         Â               ö                  ”           ~           ¤                 (msi         ž  ø                  €  ±                                                                                                                  (   š            R      S      Q      P      :  pcie_phy_ref pcie_aux pcie_apb_phy pcie_apb_sys pcie_aclk           ¿   ?             ufs@ff3b0000          #    hisilicon,hi3660-ufs jedec,ufs-1.1            T    ÿ;             ÿ;                            ¤                  š      f      e        ref_clk phy_clk         Ë                        "      „           Ùrst       dwmmc1@ff37f000           hisilicon,hi3660-dw-mshc             T    ÿ7ð                             +            ¤       ‹            š      K              ciu biu          0Ô         "      ”           Ùreset           å   9           È        Aokay                                 .         ;         H         U         c        n   @              )default         7   A   B   C        w   D        ƒ   E      dwmmc2@ff3ff000           hisilicon,hi3660-dw-mshc             T    ÿ?ð                             +            ¤       Œ            š      L              ciu biu         "      ”           Ùreset              È        Aokay                        �         ž         ¨        )default         7   F   G   H        w   I   wlcore@2          
    ti,wl1837            T               J        ¤               watchdog@e8a06000             arm,sp805 arm,primecell          T    è `                ¤       ,            š                    wdog_clk apb_pclk         watchdog@e8a07000             arm,sp805 arm,primecell          T    è p                ¤       -            š                    wdog_clk apb_pclk         tsensor@fff30000              hisilicon,hi3660-tsensor             T    ÿó                 ¤       ‘           »            Þ   K      thermal-zones      cls0            Ñ  è        ß   d        õ  ”           K      trips      trip-point@0              ýè        #  è         Opassive       trip-point@1             $ø        #  è         Opassive          Þ   L         cooling-maps       map0            .   L        3         0  @   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ      map1            .   L        3         0  @   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ               usb3_otg_bc@ff200000              syscon simple-mfd            T    ÿ             usb-phy           hisilicon,hi3660-usb-phy            O            Z           s   M        Š$fä         Þ   N         dwc3@ff100000         
    snps,dwc3            T    ÿ                  š            I        ref bus_early           ¦      I        ¶¦C@      0  "      �         �         �         �           ¤       Ÿ          ¡           Ë   N      	  Ðusb3-phy            Úotg         âsuper-speed         ðutmi             ù                  1         J         c        }            ‘         ©         ¿        Ïhost       port                         +       endpoint@0           T            š   O         Þ         endpoint@1           T           š   P         Þ               etm@ecc40000          "    arm,coresight-etm4x arm,primecell            T    ìÄ                  š            	  apb_pclk             D      out-ports      port       endpoint            š   Q         Þ   V               etm@ecd40000          "    arm,coresight-etm4x arm,primecell            T    ìÔ                  š            	  apb_pclk             D      out-ports      port       endpoint            š   R         Þ   W               etm@ece40000          "    arm,coresight-etm4x arm,primecell            T    ìä                  š            	  apb_pclk             D      out-ports      port       endpoint            š   S         Þ   X               etm@ecf40000          "    arm,coresight-etm4x arm,primecell            T    ìô                  š            	  apb_pclk             D      out-ports      port       endpoint            š   T         Þ   Y               funnel@ec801000       +    arm,coresight-dynamic-funnel arm,primecell           T    ì€                 š            	  apb_pclk       out-ports      port       endpoint            š   U         Þ   Z            in-ports                         +       port@0           T       endpoint            š   V         Þ   Q         port@1           T      endpoint            š   W         Þ   R         port@2           T      endpoint            š   X         Þ   S         port@3           T      endpoint            š   Y         Þ   T               etf@ec802000               arm,coresight-tmc arm,primecell          T    ì€                  š            	  apb_pclk       in-ports       port       endpoint            š   Z         Þ   U            out-ports      port       endpoint            š   [         Þ   h               etm@ed440000          "    arm,coresight-etm4x arm,primecell            T    íD                  š            	  apb_pclk             D      out-ports      port       endpoint            š   \         Þ   a               etm@ed540000          "    arm,coresight-etm4x arm,primecell            T    íT                  š            	  apb_pclk             D      out-ports      port       endpoint            š   ]         Þ   b               etm@ed640000          "    arm,coresight-etm4x arm,primecell            T    íd                  š            	  apb_pclk             D      out-ports      port       endpoint            š   ^         Þ   c               etm@ed740000          "    arm,coresight-etm4x arm,primecell            T    ít                  š            	  apb_pclk             D   	   out-ports      port       endpoint            š   _         Þ   d               funnel@ed001000       +    arm,coresight-dynamic-funnel arm,primecell           T    í                  š            	  apb_pclk       out-ports      port       endpoint            š   `         Þ   e            in-ports                         +       port@0           T       endpoint            š   a         Þ   \         port@1           T      endpoint            š   b         Þ   ]         port@2           T      endpoint            š   c         Þ   ^         port@3           T      endpoint            š   d         Þ   _               etf@ed002000               arm,coresight-tmc arm,primecell          T    í                   š            	  apb_pclk       in-ports       port       endpoint            š   e         Þ   `            out-ports      port       endpoint            š   f         Þ   i               funnel            arm,coresight-static-funnel          š            	  apb_pclk       out-ports      port       endpoint            š   g         Þ   k            in-ports                         +       port@0           T       endpoint            š   h         Þ   [         port@1           T      endpoint            š   i         Þ   f               funnel@ec031000       +    arm,coresight-dynamic-funnel arm,primecell           T    ì                 š            	  apb_pclk       out-ports      port       endpoint            š   j         Þ   l            in-ports                         +       port@0           T       endpoint            š   k         Þ   g               etf@ec036000               arm,coresight-tmc arm,primecell          T    ì`                 š            	  apb_pclk       in-ports       port       endpoint            š   l         Þ   j            out-ports      port       endpoint            š   m         Þ   n               replicator             arm,coresight-static-replicator          š            	  apb_pclk       in-ports       port       endpoint            š   n         Þ   m            out-ports                        +       port@0           T       endpoint            š   o         Þ   q         port@1           T      endpoint            š   p         Þ   r               etr@ec033000               arm,coresight-tmc arm,primecell          T    ì0                 š            	  apb_pclk       in-ports       port       endpoint            š   q         Þ   o               tpiu@ec032000         !    arm,coresight-tpiu arm,primecell             T    ì                  š            	  apb_pclk       in-ports       port       endpoint            š   r         Þ   p               gpio-range          è            Þ   s      pinmux@e896c000           pinctrl-single           T    è–À       ð        	                      *            H            e   s              s      t             Þ   4   pmu_pmx_func                                           csi0_pwd_n_pmx_func            D          csi1_pwd_n_pmx_func            L          isp0_pmx_func              X      d      h         isp1_pmx_func              \      l      p         pwr_key_pmx_func               €             Þ   t      i2c3_pmx_func              ,      0            Þ          i2c4_pmx_func              �      ”         pcie_perstn_pmx_func              \         usbhub5734_pmx_func                            uart0_pmx_func             Ì      Ð            Þ   $      uart1_pmx_func              °      ´      ¨      ¬            Þ   '      uart2_pmx_func              ¼      À      È      Ä            Þ   )      uart3_pmx_func              Ü      à      ä      è            Þ   +      uart4_pmx_func              ì      ð      ô      ø            Þ   -      uart5_pmx_func              Ä      È      ¼      À            Þ   0      uart6_pmx_func              Ì      Ð      Ô      Ø            Þ   2      cam0_rst_pmx_func              È          cam1_rst_pmx_func             $             pinmux@ff37e000           pinctrl-single           T    ÿ7à                           	           *            H           e   s                    Þ   6   sd_pmx_func       0                                                Þ   A         pinmux@ff3b6000           pinctrl-single           T    ÿ;`        0        	                      *            H           e   s                    Þ   5   ufs_pmx_func                               spi3_pmx_func                                             Þ   <         pinmux@ff3fd000           pinctrl-single           T    ÿ?Ð                	                      *            H           e   s                    Þ   7   sdio_pmx_func         0                                                Þ   F         pinmux@fff11000           pinctrl-single           T    ÿñ        ¨        	                      *            H           e   s       *             Þ   8   i2s2_pmx_func               D      H      L      P         slimbus_pmx_func               ,      0         i2c0_pmx_func                                Þ         i2c1_pmx_func                                 Þ         i2c7_pmx_func              $      (            Þ   "      pcie_pmx_func              „      ˆ         spi2_pmx_func               Œ      �      ”      ˜            Þ   :      i2s0_pmx_func               4      8      <      @            pinmux@e896c800           pinconf-single           T    è–È                	           *       pmu_cfg_func                                                “                      °                      Ë       ð      i2c3_cfg_func              8       <            “                      °                      Ë       ð         Þ   !      csi0_pwd_n_cfg_func            P            “                      °                      Ë      ð      csi1_pwd_n_cfg_func            X            “                      °                      Ë      ð      isp0_cfg_func              d       p       t            “                      °                      Ë      ð      isp1_cfg_func              h       x       |            “                      °                      Ë      ð      pwr_key_cfg_func               Œ            “                      °                      Ë       ð         Þ   u      uart1_cfg_func              ´       ¸       ¼       À            “                      °                      Ë       ð         Þ   (      uart2_cfg_func              È       Ì       Ð       Ô            “                      °                      Ë       ð         Þ   *      uart5_cfg_func              È       Ì       Ð       Ô            “                      °                      Ë       ð         Þ   1      cam0_rst_cfg_func              Ô            “                      °                      Ë      ð      uart0_cfg_func             Ø       Ü            “                      °                      Ë       ð         Þ   %      uart6_cfg_func              Ø       Ü       à       ä            “                      °                      Ë       ð         Þ   3      uart3_cfg_func              è       ì       ð       ô            “                      °                      Ë       ð         Þ   ,      uart4_cfg_func              ø       ü                         “                      °                      Ë       ð         Þ   .      cam1_rst_cfg_func             0            “                      °                      Ë      ð         pinmux@ff3b6800           pinconf-single           T    ÿ;h                	           *       ufs_cfg_func                                   “                      °                      Ë   0   ð      spi3_cfg_func                                                “                      °                      Ë       ð         Þ   =         pinmux@ff3fd800           pinconf-single           T    ÿ?Ø                	           *       sdio_clk_cfg_func                           “                      °                      Ë   ð   ð         Þ   G      sdio_cfg_func         (                                             “                      °                     Ë   €   ð         Þ   H         pinmux@ff37e800           pinconf-single           T    ÿ7è                	           *       sd_clk_cfg_func                         “                      °                      Ë   ð   ð         Þ   B      sd_cfg_func       (                                             “                      °                     Ë   €   ð         Þ   C         pinmux@fff11800           pinconf-single           T    ÿñ        ¼        	           *       i2c0_cfg_func                                  “                      °                     Ë       ð         Þ         i2c1_cfg_func              $       (            “                      °                     Ë       ð         Þ         i2c7_cfg_func              ,       0            “                      °                     Ë       ð         Þ   #      slimbus_cfg_func               4       8            “                      °                     Ë       ð      i2s0_cfg_func               @       D       H       L            “                      °                     Ë       ð      i2s2_cfg_func               P       T       X       \            “                      °                     Ë       ð      pcie_cfg_func              ”       ˜            “                      °                     Ë       ð      spi2_cfg_func               œ               ¤       ¨            “                      °                     Ë       ð         Þ   ;      usb_cfg_func               ¬            “                      °                     Ë       ð         Þ               aliases         é/soc/dwmmc1@ff37f000            ï/soc/dwmmc2@ff3ff000            õ/soc/serial@fdf02000            ý/soc/serial@fdf00000            /soc/serial@fdf03000            /soc/serial@ffd74000            /soc/serial@fdf01000            /soc/serial@fdf05000            %/soc/serial@fff32000          chosen          -serial6:115200n8          memory@0             Hmemory           T                      reserved-memory                      +            Â   ramoops@32000000              ramoops          T    2                  9           E           R            reboot-mode-syscon@32100000           syscon simple-mfd            T    2            reboot-mode           syscon-reboot-mode          ^            ewfU        qwfU         �wfU         keys          
    gpio-keys           )default         7   t   u   power            �        Î   v              HGPIO Power          �   t         leds          
    gpio-leds      user_led1           Hgreen:user1         Î   >             
  ¨heartbeat         user_led2           Hgreen:user2         Î   >               ¨none          user_led3           Hgreen:user3         Î   w               ¨mmc0          user_led4           Hgreen:user4         Î   w                ¾        ¨none          wlan_active_led         Hyellow:wlan         Î   @               ¨phy0tx          Îoff       bt_active_led           Hblue:bt         Î   @               ¨hci0-power          Îoff          pmic@fff34000             hisilicon,hi6421v530-pmic            T    ÿó@                 �        ~      regulators     LDO3            ÜVOUT3_1V85          ë w@        	 !‘À        	   x      LDO9            ÜVOUT9_1V8_2V95          ë ³ð        	 2Z         	   ð         Þ   E      LDO11           ÜVOUT11_1V8_2V95         ë ³ð        	 2Z         	   ð      LDO15           ÜVOUT15_3V0          ë ³ð        	 -ÆÀ         	7         	I        	   x      LDO16           ÜVOUT16_2V95         ë ³ð        	 -ÆÀ        	  h         Þ   D            wlan-en-1-8v              regulator-fixed         Üwlan-en-regulator           ë w@        	 w@        	]   x               	b p         	s         Þ   I      firmware       optee             linaro,optee-tz          =smc             	compatible interrupt-parent #address-cells #size-cells model method cpu device_type reg enable-method next-level-cache cpu-idle-states capacity-dmips-mhz clocks operating-points-v2 #cooling-cells dynamic-power-coefficient phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns #interrupt-cells interrupt-controller interrupts interrupt-affinity ranges #clock-cells #reset-cells hisi,rst-syscon #mbox-cells mboxes clock-names clock-frequency resets pinctrl-names pinctrl-0 status label data-role power-role try-power-role source-pdos sink-pdos op-sink-microwatt remote-endpoint adi,dsi-lanes dma-names dmas enable-gpios max-speed #dma-cells dma-channels dma-requests dma-channel-mask dma-no-cci dma-type interrupt-names gpio-controller #gpio-cells gpio-ranges gpio-line-names num-cs cs-gpios reg-names bus-range num-lanes interrupt-map-mask interrupt-map reset-gpios freq-table-hz reset-names hisilicon,peripheral-syscon card-detect-delay bus-width cap-sd-highspeed sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 disable-wp cd-gpios vmmc-supply vqmmc-supply non-removable broken-cd cap-power-off-card #thermal-sensor-cells polling-delay polling-delay-passive sustainable-power thermal-sensors temperature hysteresis trip contribution cooling-device #phy-cells hisilicon,pericrg-syscon hisilicon,pctrl-syscon hisilicon,eye-diagram-param assigned-clocks assigned-clock-rates phys phy-names dr_mode maximum-speed phy_type snps,dis-del-phy-power-chg-quirk snps,lfps_filter_quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk snps,tx_de_emphasis_quirk snps,tx_de_emphasis snps,dis_enblslpm_quirk snps,gctl-reset-quirk usb-role-switch role-switch-default-mode #pinctrl-single,gpio-range-cells #pinctrl-cells #gpio-range-cells pinctrl-single,register-width pinctrl-single,function-mask pinctrl-single,gpio-range pinctrl-single,pins pinctrl-single,bias-pulldown pinctrl-single,bias-pullup pinctrl-single,drive-strength mshc1 mshc2 serial0 serial1 serial2 serial3 serial4 serial5 serial6 stdout-path record-size console-size ftrace-size offset mode-normal mode-bootloader mode-recovery wakeup-source linux,code linux,default-trigger panic-indicator default-state regulator-name regulator-min-microvolt regulator-max-microvolt regulator-enable-ramp-delay regulator-boot-on regulator-always-on gpio startup-delay-us enable-active-high 