Ðþí  ‹‚   8  �ˆ   (            	ú  �P                             &    firefly,roc-rk3328-cc rockchip,rk3328                                    +            7Firefly roc-rk3328-cc      aliases          =/serial@ff110000             E/serial@ff120000             M/serial@ff130000             U/i2c@ff150000            Z/i2c@ff160000            _/i2c@ff170000            d/i2c@ff180000            i/ethernet@ff540000           s/ethernet@ff550000        cpus                         +       cpu@0            }cpu           arm,cortex-a53           ‰                 �               ”            £            ³   x         Ípsci             Û            ì                          	      cpu@1            }cpu           arm,cortex-a53           ‰                �               ”            £            ³   x         Ípsci             Û            ì                          
      cpu@2            }cpu           arm,cortex-a53           ‰                �               ”            £            ³   x         Ípsci             Û            ì                                cpu@3            }cpu           arm,cortex-a53           ‰                �               ”            £            ³   x         Ípsci             Û            ì                                idle-states         psci       cpu-sleep             arm,idle-state                    1           H   x        Y   ú        i  „                    l2-cache0             cache                       opp_table0            operating-points-v2          z              opp-408000000           …    Q–         Œ ~ð        š  œ@         «      opp-600000000           …    #ÃF         Œ ~ð        š  œ@      opp-816000000           …    0£,         Œ B@        š  œ@      opp-1008000000          …    <Ü         Œ Èà        š  œ@      opp-1200000000          …    G†Œ         Œ ±(        š  œ@      opp-1296000000          …    M?d         Œ Ö         š  œ@         bus           simple-bus                       +            ·   dmac@ff1f0000             arm,pl330 arm,primecell          ‰    ÿ        @         ¾                              É         �      †      	  àapb_pclk            ì                       analog-sound              simple-audio-card           ÷i2s                    *Analog        	  Adisabled       simple-audio-card,cpu           H         simple-audio-card,codec         H            arm-pmu           arm,cortex-a53-pmu        0  ¾       d          e          f          g           R   	   
            display-subsystem             rockchip,display-subsystem          e         hdmi-sound            simple-audio-card           ÷i2s            €        *HDMI          	  Adisabled       simple-audio-card,cpu           H         simple-audio-card,codec         H            psci              arm,psci-1.0 arm,psci-0.2            Ôsmc       timer             arm,armv8-timer       0  ¾                              
        xin24m            fixed-clock         k            xn6         ˆxin24m             D      i2s@ff000000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ‰    ÿ                  ¾                   �      )     7        ài2s_clk i2s_hclk            ›                     tx rx           ª          	  Adisabled                     i2s@ff010000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ‰    ÿ                 ¾                   �      *     8        ài2s_clk i2s_hclk            ›                     tx rx           ª          	  Adisabled                     i2s@ff020000          (    rockchip,rk3328-i2s rockchip,rk3066-i2s          ‰    ÿ                 ¾                   �      +     9        ài2s_clk i2s_hclk            ›                      tx rx           ª          	  Adisabled          spdif@ff030000            rockchip,rk3328-spdif            ‰    ÿ                 ¾                   �      .     :      
  àmclk hclk           ›      
         tx          »default         É           ª          	  Adisabled          pdm@ff040000              rockchip,pdm             ‰    ÿ                  �      =     R        àpdm_clk pdm_hclk            ›               rx          »default sleep           É                       Ó                     	  Adisabled          syscon@ff100000       &    rockchip,rk3328-grf syscon simple-mfd            ‰    ÿ                    :   io-domains        "    rockchip,rk3328-io-voltage-domain           Aokay            Ý           ë           ù                                 #           1         grf-gpio              rockchip,rk3328-grf-gpio             >        N              d      power-controller          !    rockchip,rk3328-power-controller            Z                        +               <   power-domain@6           ‰         power-domain@5           ‰         power-domain@8           ‰            �      �     F         reboot-mode           syscon-reboot-mode          n  È        uRBÃ         �RBÃ        �RBÃ	        ŸRBÃ         serial@ff110000       &    rockchip,rk3328-uart snps,dw-apb-uart            ‰    ÿ                 ¾       7            �      &      Ò        àbaudclk apb_pclk            ›                     tx rx           »default         É       !   "        «           ¸         	  Adisabled          serial@ff120000       &    rockchip,rk3328-uart snps,dw-apb-uart            ‰    ÿ                 ¾       8            �      '      Ó        àbaudclk apb_pclk            ›                     tx rx           »default         É   #   $   %        «           ¸         	  Adisabled          serial@ff130000       &    rockchip,rk3328-uart snps,dw-apb-uart            ‰    ÿ                 ¾       9            �      (      Ô        àbaudclk apb_pclk            ›                     tx rx           »default         É   &        «           ¸           Aokay          i2c@ff150000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ‰    ÿ                 ¾       $                        +             �      7      Í      	  ài2c pclk            »default         É   '      	  Adisabled          i2c@ff160000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ‰    ÿ                 ¾       %                        +             �      8      Î      	  ài2c pclk            »default         É   (        Aokay       pmic@18           rockchip,rk805           ‰               )        ¾              k           ˆxin32k rk805-clkout2             >        N           »default         É   *         Â         ã        ñ   +        ý   +        	   +           +        !           -              g   regulators     DCDC_REG1         
  9vdd_logic           H 
ß4        `           x         Œ   regulator-state-mem          ž        ¶ B@         DCDC_REG2           9vdd_arm         H 
ß4        `           x         Œ              regulator-state-mem          ž        ¶ ~ð         DCDC_REG3           9vcc_ddr          x         Œ   regulator-state-mem          ž         DCDC_REG4           9vcc_io          H 2Z         ` 2Z          x         Œ              regulator-state-mem          ž        ¶ 2Z          LDO_REG1            9vcc_18          H w@        ` w@         x         Œ              regulator-state-mem          ž        ¶ w@         LDO_REG2            9vcc18_emmc          H w@        ` w@         x         Œ              regulator-state-mem          ž        ¶ w@         LDO_REG3            9vdd_10          H B@        ` B@         x         Œ   regulator-state-mem          ž        ¶ B@                  i2c@ff170000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ‰    ÿ                 ¾       &                        +             �      9      Ï      	  ài2c pclk            »default         É   ,      	  Adisabled          i2c@ff180000          (    rockchip,rk3328-i2c rockchip,rk3399-i2c          ‰    ÿ                 ¾       '                        +             �      :      Ð      	  ài2c pclk            »default         É   -      	  Adisabled          spi@ff190000          (    rockchip,rk3328-spi rockchip,rk3066-spi          ‰    ÿ                 ¾       1                        +             �             Ñ        àspiclk apb_pclk         ›            	         tx rx           »default         É   .   /   0   1      	  Adisabled          watchdog@ff1a0000             snps,dw-wdt          ‰    ÿ                 ¾       (            �      ì      pwm@ff1b0000              rockchip,rk3328-pwm          ‰    ÿ                  �      <      Ö      	  àpwm pclk            »default         É   2        Ò         	  Adisabled          pwm@ff1b0010              rockchip,rk3328-pwm          ‰    ÿ                 �      <      Ö      	  àpwm pclk            »default         É   3        Ò         	  Adisabled          pwm@ff1b0020              rockchip,rk3328-pwm          ‰    ÿ                  �      <      Ö      	  àpwm pclk            »default         É   4        Ò         	  Adisabled          pwm@ff1b0030              rockchip,rk3328-pwm          ‰    ÿ 0               ¾       2            �      <      Ö      	  àpwm pclk            »default         É   5        Ò         	  Adisabled          thermal-zones      soc-thermal         Ý           ó  è          è           6       trips      trip-point0         # p        /  Ð         „passive       trip-point1         # L        /  Ð         „passive            7      soc-crit            # s        /  Ð      	   „critical             cooling-maps       map0            :   7      0  ?   	ÿÿÿÿÿÿÿÿ   
ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ        N                  tsadc@ff250000            rockchip,rk3328-tsadc            ‰    ÿ%                 ¾       :           [      $        k  ÃP         �      $      Õ        àtsadc apb_pclk          »init default sleep          É   8        Ó   9        €   8        Š      B      
  ‘tsadc-apb           �   :        ª †         Á           Aokay               6      efuse@ff260000            rockchip,rk3328-efuse            ‰    ÿ&         P                     +            �      >        àpclk_efuse          ×       id@7             ‰            cpu-leakage@17           ‰            logic-leakage@19             ‰            cpu-version@1a           ‰              ë                 E         adc@ff280000          .    rockchip,rk3328-saradc rockchip,rk3399-saradc            ‰    ÿ(                 ¾       P           ð            �      %      ê        àsaradc apb_pclk         Š      V        ‘saradc-apb        	  Adisabled          gpu@ff300000          "    rockchip,rk3328-mali arm,mali-450            ‰    ÿ0               T  ¾       Z          W          ]          X          Y          [          \         "  gp gpmmu pp pp0 ppmmu0 pp1 ppmmu1            �      ‡      ‡      	  àbus core            Š      f      iommu@ff330200            rockchip,iommu           ‰    ÿ3                ¾       `         
  h265e_mmu            �      “      Ý        àaclk iface                    	  Adisabled          iommu@ff340800            rockchip,iommu           ‰    ÿ4        @        ¾       b         	  vepu_mmu             �      �     F        àaclk iface                    	  Adisabled          video-codec@ff350000              rockchip,rk3328-vpu          ‰    ÿ5                 ¾       	           vdpu             �      �     F      
  àaclk hclk              ;        &   <         iommu@ff350800            rockchip,iommu           ‰    ÿ5        @        ¾                  vpu_mmu          �      �     F        àaclk iface                      &   <              ;      iommu@ff360480            rockchip,iommu            ‰    ÿ6€       @    ÿ6À       @        ¾       J           rkvdec_mmu           �      ‹     B        àaclk iface                    	  Adisabled          vop@ff370000              rockchip,rk3328-vop          ‰    ÿ7        >ü        ¾                    �      ‘      x     ;        àaclk_vop dclk_vop hclk_vop          Š      …      †      ‡        ‘axi ahb dclk               =        Aokay       port                         +                  endpoint@0           ‰            4   >           C            iommu@ff373f00            rockchip,iommu           ‰    ÿ7?                ¾                   vop_mmu          �      ‘     ;        àaclk iface                      Aokay               =      hdmi@ff3c0000             rockchip,rk3328-dw-hdmi          ‰    ÿ<                 «           ¾       #          G            �      ç      F              àiahb isfr cec           D   ?        Ihdmi            »default         É   @   A   B        �   :        ª            Aokay                  ports      port       endpoint            4   C           >               codec@ff410000            rockchip,rk3328-codec            ‰    ÿA                  �      ë      *      
  àpclk mclk           �   :        ª          	  Adisabled                     phy@ff430000              rockchip,rk3328-hdmi-phy             ‰    ÿC                 ¾       S            �      ä   D      y        àsysclk refoclk refpclk        	  ˆhdmi_phy            k            S   E        _cpu-version         p            Aokay               ?      clock-controller@ff440000         (    rockchip,rk3328-cru rockchip,cru syscon          ‰    ÿD                 �   :        k           {         ø  [      x      =            &      '      (      ˆ      ‰      Ž      …      ƒ      Š      Œ      �      A      B      D      C      "      \      5                        ˆ     H      Ø      ‰     4      æ            $  ˆ      z               D   D   D      |  k    ©€     n6 n6 n6  äáÀ äáÀõá õá õá õá úð€õá õá õá úð€úð€úð€úð€n6 #ÃF L  G†Œ ðÑ€xhÀxhÀðÑ€xhÀxhÀ  €                  syscon@ff450000       .    rockchip,rk3328-usb2phy-grf syscon simple-mfd            ‰    ÿE                              +      usb2-phy@100              rockchip,rk3328-usb2phy          ‰               �   D        àphyclk          ˆusb480m_phy         k            [      {        ˆ   F        Aokay               F   otg-port            p          $  ¾       ;          <          =           otg-bvalid otg-id linestate         Aokay               U      host-port           p            ¾       >         
  linestate           Aokay               V            mmc@ff500000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ‰    ÿP        @         ¾                    �     =      !      J      N        àbiu ciu ciu-drive ciu-sample            Ÿ           ªðÑ€        Aokay            ¸            Â         Ô         å        »default         É   G   H   I   J         ð         ý         
                 %   K        1         mmc@ff510000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ‰    ÿQ        @         ¾                    �     >      "      K      O        àbiu ciu ciu-drive ciu-sample            Ÿ           ªðÑ€      	  Adisabled          mmc@ff520000          0    rockchip,rk3328-dw-mshc rockchip,rk3288-dw-mshc          ‰    ÿR        @         ¾                    �     ?      #      L      P        àbiu ciu ciu-drive ciu-sample            Ÿ           ªðÑ€        Aokay            ¸            Â         >         K         Z        »default         É   L   M   N        %           1         ethernet@ff540000             rockchip,rk3328-gmac             ‰    ÿT                 ¾                  macirq        8   �      d      W      X      Z      Y      –      ß      M  àstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref clk_mac_refout aclk_mac pclk_mac            Š      c      
  ‘stmmaceth           �   :        h           Aokay            [      d      f        ˆ   O   O        sinput           €   P        ‹rgmii           »default         É   Q         ”        �   )               ­        Ã      '  ÃP        Ø           ã   $        ì         ethernet@ff550000             rockchip,rk3328-gmac             ‰    ÿU                 �   :        ¾                  macirq        8   �      T      S      S      U      •      Þ      V      I  àstmmaceth mac_clk_rx mac_clk_tx clk_mac_ref aclk_mac pclk_mac clk_macphy            Š      b      d        ‘stmmaceth mac-phy           ‹rmii            õ   R        h           soutput        	  Adisabled       mdio              snps,dwmac-mdio                      +       ethernet-phy@0        4    ethernet-phy-id1234.d400 ethernet-phy-ieee802.3-c22          ‰             �      V        Š      d        »default         É   S   T                     R            usb@ff580000          2    rockchip,rk3328-usb rockchip,rk3066-usb snps,dwc2            ‰    ÿX                 ¾                   �     M        àotg         host                       ,          ;      €   €   @               D   U      	  Iusb2-phy            Aokay          usb@ff5c0000              generic-ehci             ‰    ÿ\                 ¾                   �     N   F        D   V        Iusb         Aokay          usb@ff5d0000              generic-ohci             ‰    ÿ]                 ¾                   �     N   F        D   V        Iusb         Aokay          usb@ff600000              rockchip,rk3328-dwc3 snps,dwc3           ‰    ÿ`                 ¾       C            �      `      a      „        àref_clk suspend_clk bus_clk         otg       
  Jutmi_wide            S         t         Œ         ®         Ï         è      	  Adisabled          interrupt-controller@ff811000             arm,gic-400         	                         	      @   ‰    ÿ�            ÿ�              ÿ�@             ÿ�`                 ¾      	                   pinctrl           rockchip,rk3328-pinctrl         �   :                     +            ·   gpio0@ff210000            rockchip,gpio-bank           ‰    ÿ!                 ¾       3            �      È         >        N            	        	              b      gpio1@ff220000            rockchip,gpio-bank           ‰    ÿ"                 ¾       4            �      É         >        N            	        	              )      gpio2@ff230000            rockchip,gpio-bank           ‰    ÿ#                 ¾       5            �      Ê         >        N            	        	         gpio3@ff240000            rockchip,gpio-bank           ‰    ÿ$                 ¾       6            �      Ë         >        N            	        	         pcfg-pull-up             	'           Y      pcfg-pull-down           	4           a      pcfg-pull-none           	C           W      pcfg-pull-none-2ma           	C        	P              `      pcfg-pull-up-2ma             	'        	P         pcfg-pull-up-4ma             	'        	P              Z      pcfg-pull-none-4ma           	C        	P              ]      pcfg-pull-down-4ma           	4        	P         pcfg-pull-none-8ma           	C        	P              [      pcfg-pull-up-8ma             	'        	P              \      pcfg-pull-none-12ma          	C        	P              ^      pcfg-pull-up-12ma            	'        	P              _      pcfg-output-high             	_      pcfg-output-low          	k      pcfg-input-high          	'         	v           X      pcfg-input           	v      i2c0       i2c0-xfer            	ƒ            W            W           '         i2c1       i2c1-xfer            	ƒ            W            W           (         i2c2       i2c2-xfer            	ƒ            W            W           ,         i2c3       i2c3-xfer            	ƒ             W             W           -      i2c3-pins            	ƒ              W              W         hdmi_i2c       hdmii2c-xfer             	ƒ             W             W           A         pdm-0      pdmm0-clk           	ƒ            W                 pdmm0-fsync         	ƒ            W      pdmm0-sdi0          	ƒ            W                 pdmm0-sdi1          	ƒ            W                 pdmm0-sdi2          	ƒ            W                 pdmm0-sdi3          	ƒ            W                 pdmm0-clk-sleep         	ƒ             X                 pdmm0-sdi0-sleep            	ƒ             X                 pdmm0-sdi1-sleep            	ƒ             X                 pdmm0-sdi2-sleep            	ƒ             X                 pdmm0-sdi3-sleep            	ƒ             X                 pdmm0-fsync-sleep           	ƒ             X         tsadc      otp-pin         	ƒ             W           8      otp-out         	ƒ            W           9         uart0      uart0-xfer           	ƒ      	      W            Y                  uart0-cts           	ƒ            W           !      uart0-rts           	ƒ      
      W           "      uart0-rts-pin           	ƒ      
       W         uart1      uart1-xfer           	ƒ            W            Y           #      uart1-cts           	ƒ            W           $      uart1-rts           	ƒ            W           %      uart1-rts-pin           	ƒ             W         uart2-0    uart2m0-xfer             	ƒ             W            Y         uart2-1    uart2m1-xfer             	ƒ             W            Y           &         spi0-0     spi0m0-clk          	ƒ            Y      spi0m0-cs0          	ƒ            Y      spi0m0-tx           	ƒ      	      Y      spi0m0-rx           	ƒ      
      Y      spi0m0-cs1          	ƒ            Y         spi0-1     spi0m1-clk          	ƒ            Y      spi0m1-cs0          	ƒ            Y      spi0m1-tx           	ƒ            Y      spi0m1-rx           	ƒ            Y      spi0m1-cs1          	ƒ            Y         spi0-2     spi0m2-clk          	ƒ             Y           .      spi0m2-cs0          	ƒ            Y           1      spi0m2-tx           	ƒ            Y           /      spi0m2-rx           	ƒ            Y           0         i2s1       i2s1-mclk           	ƒ            W      i2s1-sclk           	ƒ            W      i2s1-lrckrx         	ƒ            W      i2s1-lrcktx         	ƒ            W      i2s1-sdi            	ƒ            W      i2s1-sdo            	ƒ            W      i2s1-sdio1          	ƒ            W      i2s1-sdio2          	ƒ            W      i2s1-sdio3          	ƒ            W      i2s1-sleep        �  	ƒ             X             X             X             X             X             X             X             X             X         i2s2-0     i2s2m0-mclk         	ƒ            W      i2s2m0-sclk         	ƒ            W      i2s2m0-lrckrx           	ƒ            W      i2s2m0-lrcktx           	ƒ            W      i2s2m0-sdi          	ƒ            W      i2s2m0-sdo          	ƒ            W      i2s2m0-sleep          `  	ƒ             X             X             X             X             X             X         i2s2-1     i2s2m1-mclk         	ƒ            W      i2s2m1-sclk         	ƒ             W      i2sm1-lrckrx            	ƒ            W      i2s2m1-lrcktx           	ƒ            W      i2s2m1-sdi          	ƒ            W      i2s2m1-sdo          	ƒ            W      i2s2m1-sleep          P  	ƒ             X              X             X             X             X         spdif-0    spdifm0-tx          	ƒ             W         spdif-1    spdifm1-tx          	ƒ            W         spdif-2    spdifm2-tx          	ƒ             W                    sdmmc0-0       sdmmc0m0-pwren          	ƒ            Z      sdmmc0m0-pin            	ƒ             Z         sdmmc0-1       sdmmc0m1-pwren          	ƒ             Z      sdmmc0m1-pin            	ƒ              Z           c         sdmmc0     sdmmc0-clk          	ƒ            [           G      sdmmc0-cmd          	ƒ            \           H      sdmmc0-dectn            	ƒ            Z           I      sdmmc0-wrprt            	ƒ            Z      sdmmc0-bus1         	ƒ             \      sdmmc0-bus4       @  	ƒ             \            \            \            \           J      sdmmc0-pins       €  	ƒ             Z             Z             Z             Z             Z             Z             Z              Z         sdmmc0ext      sdmmc0ext-clk           	ƒ            ]      sdmmc0ext-cmd           	ƒ             Z      sdmmc0ext-wrprt         	ƒ            Z      sdmmc0ext-dectn         	ƒ            Z      sdmmc0ext-bus1          	ƒ            Z      sdmmc0ext-bus4        @  	ƒ            Z            Z            Z            Z      sdmmc0ext-pins        €  	ƒ              Z             Z             Z             Z             Z             Z             Z             Z         sdmmc1     sdmmc1-clk          	ƒ            [      sdmmc1-cmd          	ƒ            \      sdmmc1-pwren            	ƒ            \      sdmmc1-wrprt            	ƒ            \      sdmmc1-dectn            	ƒ            \      sdmmc1-bus1         	ƒ            \      sdmmc1-bus4       @  	ƒ            \            \            \            \      sdmmc1-pins       �  	ƒ             Z             Z             Z             Z             Z             Z             Z             Z             Z         emmc       emmc-clk            	ƒ            ^           L      emmc-cmd            	ƒ            _           M      emmc-pwren          	ƒ            W      emmc-rstnout            	ƒ            W      emmc-bus1           	ƒ             _      emmc-bus4         @  	ƒ             _            _            _            _      emmc-bus8         €  	ƒ             _            _            _            _            _            _            _            _           N         pwm0       pwm0-pin            	ƒ            W           2         pwm1       pwm1-pin            	ƒ            W           3         pwm2       pwm2-pin            	ƒ            W           4         pwmir      pwmir-pin           	ƒ            W           5         gmac-1     rgmiim1-pins         `  	ƒ            [            ]            ]            [            ]            ]            ]      
      ]            ]            [      	      [            ]            ]            [            [             [             [             ]             [             [             [             [           Q      rmiim1-pins         	ƒ            `            ^            `            `            `            `      
      `            `            ^      	      ^             W             W             W             W             W             W         gmac2phy       fephyled-speed10            	ƒ             W      fephyled-duplex         	ƒ             W      fephyled-rxm1           	ƒ            W           S      fephyled-txm1           	ƒ            W      fephyled-linkm1         	ƒ            W           T         tsadc_pin      tsadc-int           	ƒ            W      tsadc-pin           	ƒ             W         hdmi_pin       hdmi-cec            	ƒ             W           @      hdmi-hpd            	ƒ             a           B         cif-0      dvp-d2d9-m0       À  	ƒ            W            W            W            W            W      	      W      
      W            W            W             W            W            W         cif-1      dvp-d2d9-m1       À  	ƒ            W            W            W            W            W            W            W            W            W             W            W            W         pmic       pmic-int-l          	ƒ             Y           *         usb2       usb20-host-drv          	ƒ             W           e            chosen          	‘serial2:1500000n8         external-gmac-clock           fixed-clock         xsY@        ˆgmac_clkin          k               O      dc-12v            regulator-fixed         9dc_12v           x         Œ        H ·         ` ·            f      sdmmc-regulator           regulator-fixed         ¨   b              »default         É   c         Œ        9vcc_sd          H 2Z         ` 2Z         	�              K      sdmmcio-regulator             regulator-gpio          	¨   d                 ¬ w@    2Z           	  9vcc_sdio            	®voltage         H w@        ` 2Z          x        	�   +                 vcc-host1-5v-regulator            regulator-fixed          	½        ¨   )               »default         É   e        9vcc_host1_5v             x        	�   +      vcc-sys           regulator-fixed         9vcc_sys          x         Œ        H LK@        ` LK@        	�   f           +      vcc-phy-regulator             regulator-fixed         9vcc_phy          x         Œ           P      leds          
    gpio-leds      led-0           	Ðfirefly:blue:power        
  	Öheartbeat           	¨   g              	ìon          �   #      led-1           	Ðfirefly:yellow:user         	Ömmc1            	¨   g               	ìoff         �               	compatible interrupt-parent #address-cells #size-cells model serial0 serial1 serial2 i2c0 i2c1 i2c2 i2c3 ethernet0 ethernet1 device_type reg clocks #cooling-cells cpu-idle-states dynamic-power-coefficient enable-method next-level-cache operating-points-v2 cpu-supply phandle entry-method local-timer-stop arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us opp-shared opp-hz opp-microvolt clock-latency-ns opp-suspend ranges interrupts arm,pl330-periph-burst clock-names #dma-cells simple-audio-card,format simple-audio-card,mclk-fs simple-audio-card,name status sound-dai interrupt-affinity ports #clock-cells clock-frequency clock-output-names dmas dma-names #sound-dai-cells pinctrl-names pinctrl-0 pinctrl-1 vccio1-supply vccio2-supply vccio3-supply vccio4-supply vccio5-supply vccio6-supply pmuio-supply gpio-controller #gpio-cells #power-domain-cells offset mode-normal mode-recovery mode-bootloader mode-loader reg-io-width reg-shift rockchip,system-power-controller wakeup-source vcc1-supply vcc2-supply vcc3-supply vcc4-supply vcc5-supply vcc6-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-boot-on regulator-on-in-suspend regulator-suspend-microvolt #pwm-cells polling-delay-passive polling-delay sustainable-power thermal-sensors temperature hysteresis trip cooling-device contribution assigned-clocks assigned-clock-rates pinctrl-2 resets reset-names rockchip,grf rockchip,hw-tshut-temp #thermal-sensor-cells rockchip,efuse-size bits #io-channel-cells interrupt-names #iommu-cells iommus power-domains remote-endpoint phys phy-names nvmem-cells nvmem-cell-names #phy-cells #reset-cells assigned-clock-parents fifo-depth max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed disable-wp sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 vmmc-supply vqmmc-supply mmc-ddr-1_8v mmc-hs200-1_8v non-removable snps,txpbl clock_in_out phy-supply phy-mode snps,aal snps,reset-gpio snps,reset-active-low snps,reset-delays-us snps,rxpbl tx_delay rx_delay phy-handle phy-is-integrated dr_mode g-np-tx-fifo-size g-rx-fifo-size g-tx-fifo-size phy_type snps,dis-del-phy-power-chg-quirk snps,dis_enblslpm_quirk snps,dis-tx-ipgap-linecheck-quirk snps,dis-u2-freeclk-exists-quirk snps,dis_u2_susphy_quirk snps,dis_u3_susphy_quirk #interrupt-cells interrupt-controller bias-pull-up bias-pull-down bias-disable drive-strength output-high output-low input-enable rockchip,pins stdout-path vin-supply gpios regulator-type enable-active-high label linux,default-trigger default-state 