Ðþí  ÈÐ   8  ¾°   (            
   ¾x                                                                   #   ,Inforce 6640 Single Board Computer        .   2inforce,ifc6640 qcom,apq8096-sbc qcom,apq8096            =  #           I         chosen           Wserial0:115200n8          clocks     xo-board             2fixed-clock          c             p$ø       	   €xo_board             “   c      sleep-clk            2fixed-clock          c             p  ü      
   €sleep_clk            cpus                                 cpu@0            ›cpu       
   2qcom,kryo            §                 «psci             ¹            É            Ü            “      l2-cache             2cache            í            “            cpu@1            ›cpu       
   2qcom,kryo            §                «psci             ¹            É            Ü            “         cpu@100          ›cpu       
   2qcom,kryo            §                «psci             ¹            É            Ü            “      l2-cache             2cache            í            “            cpu@101          ›cpu       
   2qcom,kryo            §               «psci             ¹            É            Ü            “         cpu-map    cluster0       core0            ù         core1            ù            cluster1       core0            ù         core1            ù               idle-states          ýpsci       cpu-sleep-0          2arm,idle-state          
standalone-power-collapse                      1   ‚        B   P        R  ,         “               firmware       scm          2qcom,scm-msm8996            c   	 0          hwlock           2qcom,tcsr-mutex         s   
               z            “         memory           ›memory           §                      etm          2qcom,coresight-remote-etm      out-ports      port       endpoint            ˆ            “   F               psci             2arm,psci-1.0             ²smc       reserved-memory                                   ˜   mba@91500000             §    ‘P                   Ÿ      slpi@90b00000            §    �°                   Ÿ      venus@90400000           §    �@       p           Ÿ         “   ?      adsp@8ea00000            §    Ž                   Ÿ         “   z      mpss@88800000            §    ˆ€                  Ÿ      smem-mem@86000000            §    †                    Ÿ         “         memory@85800000          §    …€       €           Ÿ      memory@86200000          §    †       `           Ÿ      rmtfs@86700000           2qcom,rmtfs-mem          ¦                «                        Ÿ        ¸           Ç         gpu@8f200000             2shared-dma-pool          §    �°                   Ÿ         “             rpm-glink            2qcom,glink-rpm          Ñ       ¨           Ü           í          rpm-requests             2qcom,rpm-msm8996            ôrpm_requests       qcom,rpmcc           2qcom,rpmcc-msm8996           c            “         power-controller             2qcom,msm8996-rpmpd                           opp-table            2operating-points-v2          “      opp1            0         opp2            0         opp3            0         opp4            0         opp5            0         opp6            0               pm8994-regulators            2qcom,rpm-pm8994-regulators          :           H           V           d           r           €           Ž           œ           ª           ¸           Ç           Ö           å           û                      #           4           J           `           o      s3          �vreg_s3a_1p3            � Ö         ¨ Ö          “         s4          �vreg_s4a_1p8            � w@        ¨ w@         À         “         s5          �vreg_s5a_2p15           �  Îp        ¨  Îp         “         s7          �vreg_s7a_1p0            � 5         ¨ 5       l1          �vreg_l1a_1p0            � B@        ¨ B@      l2          �vreg_l2a_1p25           � Ð        ¨ Ð      l3          �vreg_l3a_0p875          � øP        ¨ øP      l4          �vreg_l4a_1p225          � ±(        ¨ ±(      l6          �vreg_l6a_1p2            � O€        ¨ O€      l8          �vreg_l8a_1p8            � w@        ¨ w@      l9          �vreg_l9a_1p8            � w@        ¨ w@      l10         �vreg_l10a_1p8           � w@        ¨ w@      l11         �vreg_l11a_1p15          � Œ0        ¨ Œ0      l12         �vreg_l12a_1p8           � w@        ¨ w@         “   :      l13         �vreg_l13a_2p95          � w@        ¨ -p         “   e      l14         �vreg_l14a_1p8           � w@        ¨ w@      l15         �vreg_l15a_1p8           � w@        ¨ w@      l16         �vreg_l16a_2p7           � )2à        ¨ )2à      l17         �vreg_l17a_2p8           � &%         ¨ &%       l18         �vreg_l18a_2p85          � )2à        ¨ ,@       l19         �vreg_l19a_2p8           � -ÆÀ        ¨ -ÆÀ      l20         �vreg_l20a_2p95          � -p        ¨ -p         Ô         “   6      l21         �vreg_l21a_2p95          � -p        ¨ -p         “   d      l22         �vreg_l22a_3p0           � 2Z         ¨ 2Z       l23         �vreg_l23a_2p8           � *¹€        ¨ *¹€      l24         �vreg_l24a_3p075         � .ë¸        ¨ .ë¸      l25         �vreg_l25a_1p2           � O€        ¨ O€         Ô         “   7      l27         �vreg_l26a_0p8           � B@        ¨ B@      l28         �vreg_l28a_0p925         � H        ¨ H         Ô         “   9      l29         �vreg_l29a_2p8           � *¹€        ¨ *¹€      l30         �vreg_l30a_1p8           � w@        ¨ w@      l32         �vreg_l32a_1p8           � w@        ¨ w@      lvs1            �vreg_lvs1a_1p8        lvs2            �vreg_lvs2a_1p8                 smem          
   2qcom,smem           í           û            smp2p-adsp           2qcom,smp2p            »  ­        Ñ       ž           í      
                          master-kernel           ,master-kernel           <            “   {      slave-kernel            ,slave-kernel             S        h            “   y         smp2p-modem          2qcom,smp2p            ³  ¬        Ñ      Ã           í                                master-kernel           ,master-kernel           <         slave-kernel            ,slave-kernel             S        h            smp2p-slpi           2qcom,smp2p            á  ®        Ñ       ²           í                                slave-kernel            ,slave-kernel             S        h         master-kernel           ,master-kernel           <            soc                                  ˜            ÿÿÿÿ         2simple-bus     phy@34000            2qcom,msm8996-qmp-pcie-phy            § @   ˆ         c                                     ˜        y      À      ¿      Ø        €aux cfg_ahb ref         Œ      U      e      f        “phy common cfg        	  Ÿdisabled       lane@35000           § P   0 R     T   Ü        ¦             €pcie_0_pipe_clk_src         y      ´        €pipe0           Œ      P        “lane0            “   #      lane@36000           § `   0 b     d   Ü        ¦             €pcie_1_pipe_clk_src         y      ¹        €pipe1           Œ      R        “lane1            “   )      lane@37000           § p   0 r     t   Ü        ¦             €pcie_2_pipe_clk_src         y      ¾        €pipe2           Œ      T        “lane2            “   /         memory@68000             2qcom,rpm-msg-ram             § €   `          “         qfprom@74000             2qcom,qfprom          § @   ÿ                            hstx_trim@24e            §  N           ±               “   a      hstx_trim@24f            §  O           ±               “   b      gpu_speed_bin@133            §  3           ±               “            rng@83000            2qcom,prng-ee             § 0            y      ˜        €core          clock-controller@300000          2qcom,gcc-msm8996             c           ¶                       § 0   	          y      J        €cxo2             “         thermal-sensor@4a9000         !   2qcom,msm8996-tsens qcom,tsens-v2             § J�     J€            Ã           Ñ      Ê         ½           Ñuplow critical          á            “   }      thermal-sensor@4ad000         !   2qcom,msm8996-tsens qcom,tsens-v2             § JÐ     JÀ            Ã           Ñ       ¸         ®           Ñuplow critical          á            “   ~      syscon@740000            2syscon           § t              “   
      syscon@7a0000            2qcom,tcsr-msm8996 syscon             § z   €          “   	      clock-controller@8c0000          2qcom,mmcc-msm8996            c           ¶                       § Œ           (  ÷                        	              %1| 0Gž€:i� 98p 1,€@         “         mdss@900000       
   2qcom,mdss            § �      ›    @ ›€   @      "  mdss_phys vbif_phys vbif_nrt_phys           &              Ñ       S            S        h           y      t        €iface                                     ˜         “      mdp@901000        
   2qcom,mdp5            § �  	        	  mdp_phys                         Ñ             (  y      t      v      y      \      {        €iface bus core iommu vsync          4          ports                                port@0           §       endpoint            ˆ            “                  hdmi-tx@9a0000           2qcom,hdmi-tx-8996            § š         aX ž    ÿ      ,  core_physical qfprom_physical hdcp_physical                      Ñ            (  y      y      t      |      u      z      #  €mdp_core iface core alt_iface extp          ;         	  @hdmi_phy            J      ports                                port@0           §       endpoint            ˆ            “                  hdmi-phy@9a0600         ¦             2qcom,hdmi-phy-8996        0   § š   Ä š
   $ š   $ š   $ š   $ š    È      >  hdmi_pll hdmi_tx_l0 hdmi_tx_l1 hdmi_tx_l2 hdmi_tx_l3 hdmi_phy           y      t      Ö      
  €iface ref            “            gpu@b00000           2qcom,adreno-530.2 qcom,adreno           [            § °   ð         kgsl_3d0_reg_memory         Ñ      ,         (  y      f      h      g      ¨      Z      #  €core iface rbbmtimer mem mem_iface          &              4               l         
  xspeed_bin                 opp-table            2operating-points-v2          “      opp-624000000           ‰    %1|         �   	      opp-560000000           ‰    !`ì         �         opp-510000000           ‰    eû€        �   ÿ      opp-401800000           ‰    òû@        �   ÿ      opp-315000000           ‰    Æ„À        �   ÿ      opp-214000000           ‰    Áa€        �   ÿ      opp-133000000           ‰    ík@        �   ÿ         zap-shader          í             pinctrl@1010000          2qcom,msm8996-pinctrl             §   0          Ñ       Ð            ¡        ±   !           –        ½            S        h            “   !   wcd9xxx_intr       wcd_intr_default             “   w   mux         Égpio54          Îgpio          config          Égpio54          ×            æ         õ            cdc_reset_ctrl     cdc_reset_sleep    mux         Égpio64          Îgpio          config          Égpio64          ×                              cdc_reset_active             “   v   mux         Égpio64          Îgpio          config          Égpio64          ×            æ                     blsp1_spi0_default           “   h   pinmux        
  Îblsp_spi1           Égpio0 gpio1 gpio3         pinmux_cs           Îgpio            Égpio2         pinconf         Égpio0 gpio1 gpio3           ×                  pinconf_cs          Égpio2           ×                              blsp1_spi0_sleep             “   i   pinmux          Îgpio            Égpio0 gpio1 gpio2 gpio3       pinconf         Égpio0 gpio1 gpio2 gpio3         ×            æ         blsp1_i2c2_default           “   j   pinmux        
  Îblsp_i2c3           Égpio47 gpio48         pinconf         Égpio47 gpio48           ×                        blsp1_i2c2_sleep             “   k   pinmux          Îgpio            Égpio47 gpio48         pinconf         Égpio47 gpio48           ×                        blsp2_i2c0           “   n   pinmux        
  Îblsp_i2c7           Égpio55 gpio56         pinconf         Égpio55 gpio56           ×                     blsp2_i2c0_sleep             “   o   pinmux          Îgpio            Égpio55 gpio56         pinconf         Égpio55 gpio56           ×                     blsp2_uart1_2pins            “   l   pinmux          Îblsp_uart8          Égpio4 gpio5       pinconf         Égpio4 gpio5         ×                     blsp2_uart1_2pins_sleep          “   m   pinmux          Îgpio            Égpio4 gpio5       pinconf         Égpio4 gpio5         ×                     blsp2_uart1_4pins      pinmux          Îblsp_uart8          Égpio4 gpio5 gpio6 gpio7       pinconf         Égpio4 gpio5 gpio6 gpio7         ×                     blsp2_uart1_4pins_sleep    pinmux          Îgpio            Égpio4 gpio5 gpio6 gpio7       pinconf         Égpio4 gpio5 gpio6 gpio7         ×                     blsp2_i2c1           “   p   pinmux        
  Îblsp_i2c8           Égpio6 gpio7       pinconf         Égpio6 gpio7         ×                     blsp2_i2c1_sleep             “   q   pinmux          Îgpio            Égpio6 gpio7       pinconf         Égpio6 gpio7         ×                     blsp2_uart2_2pins      pinmux          Îblsp_uart9          Égpio49 gpio50         pinconf         Égpio49 gpio50           ×                     blsp2_uart2_2pins_sleep    pinmux          Îgpio            Égpio49 gpio50         pinconf         Égpio49 gpio50           ×                     blsp2_uart2_4pins      pinmux          Îblsp_uart9          Égpio49 gpio50 gpio51 gpio52       pinconf         Égpio49 gpio50 gpio51 gpio52         ×                     blsp2_uart2_4pins_sleep    pinmux          Îgpio            Égpio49 gpio50 gpio51 gpio52       pinconf         Égpio49 gpio50 gpio51 gpio52         ×                     blsp2_spi5_default           “   r   pinmux          Îblsp_spi12          Égpio85 gpio86 gpio88          pinmux_cs           Îgpio            Égpio87        pinconf         Égpio85 gpio86 gpio88            ×                  pinconf_cs          Égpio87          ×                              blsp2_spi5_sleep             “   s   pinmux          Îgpio            Égpio85 gpio86 gpio87 gpio88       pinconf         Égpio85 gpio86 gpio87 gpio88         ×            æ         sdc2_clk_on    config        	  Ésdc2_clk                     ×            sdc2_clk_off       config        	  Ésdc2_clk                     ×            sdc2_cmd_on    config        	  Ésdc2_cmd             &        ×   
         sdc2_cmd_off       config        	  Ésdc2_cmd             &        ×            sdc2_data_on       config        
  Ésdc2_data            &        ×   
         sdc2_data_off      config        
  Ésdc2_data            &        ×            pcie0_clkreq_default             “   $   mux         Égpio36          Îpci_e0        config          Égpio36          ×            &         pcie0_perst_default          “   %   mux         Égpio35          Îgpio          config          Égpio35          ×            æ         pcie0_wake_default           “   &   mux         Égpio37          Îgpio          config          Égpio37          ×            &         pcie0_clkreq_sleep           “   '   mux         Égpio36          Îgpio          config          Égpio36          ×                     pcie0_wake_sleep             “   (   mux         Égpio37          Îgpio          config          Égpio37          ×                     pcie1_clkreq_default             “   *   mux         Égpio131         Îpci_e1        config          Égpio131         ×            &         pcie1_perst_default          “   +   mux         Égpio130         Îgpio          config          Égpio130         ×            æ         pcie1_wake_default           “   ,   mux         Égpio132         Îgpio          config          Égpio132         ×            æ         pcie1_clkreq_sleep           “   -   mux         Égpio131         Îgpio          config          Égpio131         ×                     pcie1_wake_sleep             “   .   mux         Égpio132         Îgpio          config          Égpio132         ×                     pcie2_clkreq_default             “   0   mux         Égpio115         Îpci_e2        config          Égpio115         ×            &         pcie2_perst_default          “   1   mux         Égpio114         Îgpio          config          Égpio114         ×            æ         pcie2_wake_default           “   2   mux         Égpio116         Îgpio          config          Égpio116         ×            æ         pcie2_clkreq_sleep           “   3   mux         Égpio115         Îgpio          config          Égpio115         ×                     pcie2_wake_sleep             “   4   mux         Égpio116         Îgpio          config          Égpio116         ×                     cci0_default             “   <   pinmux          Îcci_i2c         Égpio17 gpio18         pinconf         Égpio17 gpio18           ×                     cci1_default             “   =   pinmux          Îcci_i2c         Égpio19 gpio20         pinconf         Égpio19 gpio20           ×                     camera_board_default       mux_pwdn            Îgpio            Égpio98        config_pwdn         Égpio98          ×                  mux_rst         Îgpio            Égpio104       config_rst          Égpio104         ×                  mux_mclk1         	  Îcam_mclk            Égpio14        config_mclk1            Égpio14          ×                     camera_front_default       mux_pwdn            Îgpio            Égpio133       config_pwdn         Égpio133         ×                  mux_rst         Îgpio            Égpio23        config_rst          Égpio23          ×                  mux_mclk2         	  Îcam_mclk            Égpio15        config_mclk2            Égpio15          ×                     camera_rear_default    mux_pwdn            Îgpio            Égpio26        config_pwdn         Égpio26          ×                  mux_rst         Îgpio            Égpio25        config_rst          Égpio25          ×                  mux_mclk0         	  Îcam_mclk            Égpio13        config_mclk0            Égpio13          ×                     sdc2-pins-default            “   f   clk       	  Ésdc2_clk                     ×         cmd       	  Ésdc2_cmd             &        ×   
      data          
  Ésdc2_data            &        ×   
      cd          Égpio38          Îgpio             &        ×            sdc2-pins-sleep          “   g   clk       	  Ésdc2_clk                     ×         cmd       	  Ésdc2_cmd             &        ×         data          
  Ésdc2_data            &        ×         cd          Égpio38          Îgpio             &        ×               qcom,spmi@400f000            2qcom,spmi-pmic-arb        (   § ð    @   €  À   €  €           !         core chnls obsrvr intr cnfg         Ñperiph_irq          Ñ      F           3            ;                                       S        h      pmic@0           2qcom,pm8994 qcom,spmi-pmic           §                                     rtc@6000             2qcom,pm8941-rtc          §  `   a       
  rtc alarm           Ñ       a            pon@800          2qcom,pm8916-pon          §           H           X      pwrkey           2qcom,pm8941-pwrkey          Ñ                      f  =	         &        o   t         gpios@c000           2qcom,pm8994-gpio             §  À          ¡        ½        `  Ñ       À               Á               Â               Ã               Ä               Å               Æ               Ç               È               É               Ê               Ë               Ì               Í               Î               Ï               Ð               Ñ               Ò               Ó               Ô               Õ              mpps@a000            2qcom,pm8994-mpp          §             ¡        ½         €  Ñ                       ¡               ¢               £               ¤               ¥               ¦               §                 pmic@1           2qcom,pm8994 qcom,spmi-pmic           §                                    regulators           2qcom,pm8994-regulators           pmic@2           2qcom,pmi8994 qcom,spmi-pmic          §                                    gpios@c000        !   2qcom,pmi8994-gpio qcom,spmi-gpio             §  À          ¡        ±   "           
        ½            S        h            “   "         pmic@3           2qcom,pmi8994 qcom,spmi-pmic          §                                    regulators           2qcom,pmi8994-regulators                                      agnoc@0         &                2simple-pm-bus                                     ˜   pcie@600000          2qcom,pcie-msm8996 snps,dw-pcie        	  Ÿdisabled            &              z       ÿ        „             § `                ¨             parf dbi elbi config            ;   #        @pciephy                                0  ˜                            0  0       Ð          Ñ      •           Ñmsi         h           Ž                     €  ¡                         ô                            õ                            ÷                            ø           ¯default sleep           ½   $   %   &        Ç   '   %   (        Ñ          (  y      ´      ³      ²      ±      °      "  €pipe aux cfg bus_master bus_slave         pcie@608000          2qcom,pcie-msm8996 snps,dw-pcie          &              z       ÿ        „         	  Ÿdisabled              § `€               ¨             parf dbi elbi config            ;   )        @pciephy                                0  ˜                            0  0       Ð          Ñ      �           Ñmsi         h           Ž                     €  ¡                                                                                                                    ¯default sleep           ½   *   +   ,        Ç   -   +   .        Ñ         (  y      ¹      ¸      ·      ¶      µ      "  €pipe aux cfg bus_master bus_slave         pcie@610000          2qcom,pcie-msm8996 snps,dw-pcie          &              z       ÿ        „         	  Ÿdisabled              § a                ¨             parf dbi elbi config            ;   /        @pciephy                                0  ˜                            0  0      Ð           ›pci         Ñ      ¥           Ñmsi         h           Ž                     €  ¡                         Ž                            �                            �                            ‘           ¯default sleep           ½   0   1   2        Ç   3   1   4        Ñ         (  y      ¾      ½      ¼      »      º      "  €pipe aux cfg bus_master bus_slave            ufshc@624000             2qcom,ufshc           § b@   %         Ñ      	           ;   5        @ufsphy          &            ’  €core_clk_src core_clk bus_clk bus_aggr_clk iface_clk core_clk_unipro_src core_clk_unipro core_clk_ice ref_clk tx_lane0_sync_clk rx_lane0_sync_clk         X  y      I      Á      R      Ñ      Â      J      È      É      J      Å      Æ      X  âõá ëÂ                                 ðÑ€á£                                                 ð           ¶           Ÿokay               6           7                   ( 	'À        9 ÝÐ        K ÝÐ         “   8   ufs_variant          2qcom,ufs_variant             phy@627000           2qcom,msm8996-qmp-ufs-phy             § bp   Ä                                  ˜        y      ×        €ref         Œ   8            “ufsphy          Ÿokay            ^   9        n   :        ~  GÌ        ”  $à   lanes@627400             § bt   , bv     b|   ´        ¦             “   5         camss@a34000             2qcom,msm8996-camss        p   § £@       0    £P       8    £`       @    £      £     £     £     £            ¡      ¡@          |  csiphy0 csiphy0_clk_mux csiphy1 csiphy1_clk_mux csiphy2 csiphy2_clk_mux csid0 csid1 csid2 csid3 ispif csi_clk_mux vfe0 vfe1       x  Ñ       N          O          P         (         )         *         +         5         :         ;         @  Ñcsiphy0 csiphy1 csiphy2 csid0 csid1 csid2 csid3 ispif vfe0 vfe1         &            	        y      �      ¹      Œ      �      Ž      ¦      ¥      §      ©      ¨      «      ª      ¬      ®      ­      °      ¯      ±      ³      ²      µ      ´      ¶      ¸      ·      ‚      ™      Ÿ      ›      š      œ             ž      �      —      ˜     :  €top_ahb ispif_ahb csiphy0_timer csiphy1_timer csiphy2_timer csi0_ahb csi0 csi0_phy csi0_pix csi0_rdi csi1_ahb csi1 csi1_phy csi1_pix csi1_rdi csi2_ahb csi2 csi2_phy csi2_pix csi2_rdi csi3_ahb csi3 csi3_phy csi3_pix csi3_rdi ahb vfe0 csi_vfe0 vfe0_ahb vfe0_stream vfe1 csi_vfe1 vfe1_ahb vfe1_stream vfe_ahb vfe_axi            4   ;       ;      ;      ;         	  Ÿdisabled       ports                                      cci@a0c000           2qcom,msm8996-cci                                       §  À            Ñ      '           &               y      �      ‹      Š      ‚      $  €camss_top_ahb cci_ahb cci camss_ahb         ÷      ‹      Š        Ä´ <4`        ¯default         ½   <   =      	  Ÿdisabled       i2c-bus@0            §             p €                                i2c-bus@1            §            p €                                   iommu@b40000          "   2qcom,msm8996-smmu-v2 qcom,smmu-v2            § ´             ª         $  Ñ      N         I         J           ½           y      h      Z      
  €iface bus           &               “         video-codec@c00000           2qcom,msm8996-venus           § À   ð         Ñ                 &               y      n      q      o      p        €core iface bus mbus          4   >       >      >   
   >      >      >      >      >   	   >      >      >      >      >      >   !   >   (   >   )   >   +   >   ,   >   -   >   1        í   ?        Ÿokay       video-decoder            2venus-decoder           y      r        €core            &            video-encoder            2venus-encoder           y      s        €core            &               iommu@d00000          "   2qcom,msm8996-smmu-v2 qcom,smmu-v2            § Ð             ª         $  Ñ       I         @         A           ½           y      [      \      
  €iface bus           &               “         iommu@d40000          "   2qcom,msm8996-smmu-v2 qcom,smmu-v2            § Ô             ª         `  Ñ               O         P         Q         R         S         T         U           &               y      b      c      
  €iface bus           ½           Ÿokay             “   >      iommu@da0000          "   2qcom,msm8996-smmu-v2 qcom,smmu-v2            § Ú             ª         $  Ñ       L         W         X           &              y      N      O      
  €iface bus           ½            “   ;      iommu@1600000         "   2qcom,msm8996-smmu-v2 qcom,smmu-v2            §`             ½           &              ª         œ  Ñ      ”          â         ‰         Š         ‹         Œ         �         Ž         �         �         ‘         ’         “           y      Û      Ü      
  €iface bus            “   |      stm@3002000           2arm,coresight-stm arm,primecell          §      (             stm-base stm-stimulus-base          y            	        €apb_pclk atclk     out-ports      port       endpoint            ˆ   @         “   B               tpiu@3020000          !   2arm,coresight-tpiu arm,primecell             §             y            	        €apb_pclk atclk     in-ports       port       endpoint            ˆ   A         “   N               funnel@3021000        +   2arm,coresight-dynamic-funnel arm,primecell           §            y            	        €apb_pclk atclk     in-ports                                 port@7           §      endpoint            ˆ   B         “   @            out-ports      port       endpoint            ˆ   C         “   H               funnel@3022000        +   2arm,coresight-dynamic-funnel arm,primecell           §             y            	        €apb_pclk atclk     in-ports                                 port@6           §      endpoint            ˆ   D         “   ^            out-ports      port       endpoint            ˆ   E         “   I               funnel@3023000        +   2arm,coresight-dynamic-funnel arm,primecell           §0            y            	        €apb_pclk atclk     in-ports       port       endpoint            ˆ   F         “               out-ports      port       endpoint            ˆ   G         “   J               funnel@3025000        +   2arm,coresight-dynamic-funnel arm,primecell           §P            y            	        €apb_pclk atclk     in-ports                                 port@0           §       endpoint            ˆ   H         “   C         port@1           §      endpoint            ˆ   I         “   E         port@2           §      endpoint            ˆ   J         “   G            out-ports      port       endpoint            ˆ   K         “   O               replicator@3026000        /   2arm,coresight-dynamic-replicator arm,primecell           §`            y            	        €apb_pclk atclk     in-ports       port       endpoint            ˆ   L         “   P            out-ports                                port@0           §       endpoint            ˆ   M         “   Q         port@1           §      endpoint            ˆ   N         “   A               etf@3027000           2arm,coresight-tmc arm,primecell          §p            y            	        €apb_pclk atclk     in-ports       port       endpoint            ˆ   O         “   K            out-ports      port       endpoint            ˆ   P         “   L               etr@3028000           2arm,coresight-tmc arm,primecell          §€            y            	        €apb_pclk atclk           Ê   in-ports       port       endpoint            ˆ   Q         “   M               debug@3810000         &   2arm,coresight-cpu-debug arm,primecell            §�             y            	  €apb_pclk             ù         etm@3840000       "   2arm,coresight-etm4x arm,primecell            §„             y            	        €apb_pclk atclk           ù      out-ports      port       endpoint            ˆ   R         “   T               debug@3910000         &   2arm,coresight-cpu-debug arm,primecell            §‘             y            	  €apb_pclk             ù         etm@3940000       "   2arm,coresight-etm4x arm,primecell            §”             y            	        €apb_pclk atclk           ù      out-ports      port       endpoint            ˆ   S         “   U               funnel@39b0000        +   2arm,coresight-dynamic-funnel arm,primecell           §›             y            	        €apb_pclk atclk     in-ports                                 port@0           §       endpoint            ˆ   T         “   R         port@1           §      endpoint            ˆ   U         “   S            out-ports      port       endpoint            ˆ   V         “   \               debug@3a10000         &   2arm,coresight-cpu-debug arm,primecell            §¡             y            	  €apb_pclk             ù         etm@3a40000       "   2arm,coresight-etm4x arm,primecell            §¤             y            	        €apb_pclk atclk           ù      out-ports      port       endpoint            ˆ   W         “   Y               debug@3b10000         &   2arm,coresight-cpu-debug arm,primecell            §±             y            	  €apb_pclk             ù         etm@3b40000       "   2arm,coresight-etm4x arm,primecell            §´             y            	        €apb_pclk atclk           ù      out-ports      port       endpoint            ˆ   X         “   Z               funnel@3bb0000        +   2arm,coresight-dynamic-funnel arm,primecell           §»             y            	        €apb_pclk atclk     in-ports                                 port@0           §       endpoint            ˆ   Y         “   W         port@1           §      endpoint            ˆ   Z         “   X            out-ports      port       endpoint            ˆ   [         “   ]               funnel@3bc0000        +   2arm,coresight-dynamic-funnel arm,primecell           §¼             y            	        €apb_pclk atclk     in-ports                                 port@0           §       endpoint            ˆ   \         “   V         port@1           §      endpoint            ˆ   ]         “   [            out-ports      port       endpoint            ˆ   ^         “   D               clock-controller@6400000             2qcom,apcc-msm8996            §@   	           c         usb@6af8800          2qcom,msm8996-dwc3 qcom,dwc3          §¯ˆ                                      ˜      0  y      Q      [      Ò      ]      \      c        ÷      ]      [        $ø '         &            	  Ÿdisabled       dwc3@6a00000          
   2snps,dwc3            §     Ì         Ñ       ƒ           ;   _   `        @usb2-phy usb3-phy           Ý             ñ         
         "         :         Y         phy@7410000          2qcom,msm8996-qmp-usb3-phy            §A    Ä         c                                     ˜        y      ^      c      Õ        €aux cfg_ahb ref         Œ      g      h        “phy common        	  Ÿdisabled       lane@7410200             §A    A   0A   ¨        ¦             €usb3_phy_pipe_clk_src           y      _        €pipe0            “   `         phy@7411000          2qcom,msm8996-qusb2-phy           §A   €        ¦            y      c      Ú        €cfg_ahb ref         Œ      	        l   a      	  Ÿdisabled             “   _      phy@7412000          2qcom,msm8996-qusb2-phy           §A    €        ¦            y      c      Ù        €cfg_ahb ref         Œ      
        l   b      	  Ÿdisabled             “   t      sdhci@74a4900           Ÿokay             2qcom,sdhci-msm-v4            §JI   J@            hc_mem core_mem         Ñ       }          Ý           Ñhc_irq pwr_irq          €iface core xo           y      h      g   c        h           r   !   &           {   d        ‡   e        ¯default sleep           ½   f        Ç   g      serial@7570000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             §W             Ñ       l           y      t      m        €core iface        	  Ÿdisabled          spi@7575000          2qcom,spi-qup-v2.2.1          §WP            Ñ       _           y      o      m        €core iface          ¯default sleep           ½   h        Ç   i                                	  Ÿdisabled          i2c@7577000          2qcom,i2c-qup-v2.2.1          §Wp            Ñ       a           y      m      v        €iface core          ¯default sleep           ½   j        Ç   k                                	  Ÿdisabled          serial@75b0000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             §[             Ñ       r           y      ˆ      �        €core iface          Ÿokay            ¯default sleep           ½   l        Ç   m      serial@75b1000        %   2qcom,msm-uartdm-v1.4 qcom,msm-uartdm             §[            Ñ       s           y      ‹      �        €core iface        	  Ÿdisabled          i2c@75b5000          2qcom,i2c-qup-v2.2.1          §[P            Ñ       e           y      �      „        €iface core          ¯default sleep           ½   n        Ç   o                                	  Ÿdisabled          i2c@75b6000          2qcom,i2c-qup-v2.2.1          §[`            Ñ       f           y      �      ‡        €iface core          ¯default sleep           ½   p        Ç   q                                	  Ÿdisabled          spi@75ba000          2qcom,spi-qup-v2.2.1          §[             Ñ       j           y      ’      �        €core iface          ¯default sleep           ½   r        Ç   s                                	  Ÿdisabled          usb@76f8800          2qcom,msm8996-dwc3 qcom,dwc3          §oˆ                                      ˜        Ñ      `           Ñhs_phy_irq        (  y      U      `      b      a      c        ÷      b      `        $ø “‡         &            	  Ÿdisabled       dwc3@7600000          
   2snps,dwc3            §`    Ì         Ñ       Š           ;   t      	  @usb2-phy             ñ         
         dma@9184000          2qcom,bam-v1.7.0          ”         §	@            ­           Ñ       ¤           º           3           Å            “   u      slim@91c0000             2qcom,slim-ngd-v1.5.0             §	   À         ctrl            Ñ       £            Ò   u      u      u      u           ×rx tx tx2 rx2                                ngd@1            §                               tas-ifd          2slim217,1a0          §                 “   x      codec@1         ½   v   w        ¯default          2slim217,1a0          §                    !        Ñ   6      5           Ñintr1 intr2          S        h           á   !   @            í   x        J               remoteproc@9300000           2qcom,msm8996-adsp-pil            §	0           @  ú          ¢      y          y         y         y            #  Ñwdog fatal ready handover stop-ack          y   c        €xo          í   z        	   {            	stop       smd-edge            Ñ       œ           	5lpass           í              	;                                           apr         &               2qcom,apr-v2         	Iapr_audio_svc           	[                                q6core           §            2qcom,q6core       q6afe            2qcom,q6afe           §      dais             2qcom,q6afe-dais                                   J      hdmi@1           §               q6asm            2qcom,q6asm           §      dais             2qcom,q6asm-dais                                   J           4   |            q6adm            2qcom,q6adm           §      routing          2qcom,q6adm-routing          J                      mailbox@9820000          2qcom,msm8996-apcs-hmss-global            §	‚             	k            “         timer@9840000                                     ˜         2arm,armv7-timer-mem          §	„              p$ø    frame@9850000           	w            Ñ                             §	…     	†           frame@9870000           	w           Ñ                    §	‡           	  Ÿdisabled          frame@9880000           	w           Ñ       !            §	ˆ           	  Ÿdisabled          frame@9890000           	w           Ñ       "            §	‰           	  Ÿdisabled          frame@98a0000           	w           Ñ       #            §	Š           	  Ÿdisabled          frame@98b0000           	w           Ñ       $            §	‹           	  Ÿdisabled          frame@98c0000           	w           Ñ       %            §	Œ           	  Ÿdisabled             syscon@9a10000           2syscon           §	¡           interrupt-controller@9bc0000             2qcom,msm8996-gic-v3 arm,gic-v3          h            S        	„           	›                §	¼     	À             Ñ      	            “            sound         thermal-zones      cpu0-thermal            	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä $ø        	ð  Ð         ¢passive       cpu_crit            	ä ­°        	ð  Ð      	   ¢critical                cpu1-thermal            	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä $ø        	ð  Ð         ¢passive       cpu_crit            	ä ­°        	ð  Ð      	   ¢critical                cpu2-thermal            	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä $ø        	ð  Ð         ¢passive       cpu_crit            	ä ­°        	ð  Ð      	   ¢critical                cpu3-thermal            	°   ú        	Æ  è        	Ô   }   
   trips      trip-point0         	ä $ø        	ð  Ð         ¢passive       cpu_crit            	ä ­°        	ð  Ð      	   ¢critical                gpu-thermal-top         	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             gpu-thermal-bottom          	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             m4m-thermal         	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             l3-or-venus-thermal         	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             cluster0-l2-thermal         	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             cluster1-l2-thermal         	°   ú        	Æ  è        	Ô   }      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             camera-thermal          	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             q6-dsp-thermal          	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             mem-thermal         	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot             modemtx-thermal         	°   ú        	Æ  è        	Ô   ~      trips      trip-point0         	ä _�        	ð  Ð         ¢hot                timer            2arm,armv8-timer       0  Ñ                                 
         aliases         	û/soc/serial@75b0000       v1p05-regulator          2regulator-fixed         �v1p05            À         
        � �        ¨ �        
         v12-poe-regulator            2regulator-fixed         �v12_poe          À         
        � ·         ¨ ·          “   €      v3p3-regulator           2regulator-fixed         �v3p3             À         
        � 2Z         ¨ 2Z         
   €      v5p0-regulator           2regulator-fixed         �v5p0             À         
        � LK@        ¨ LK@        
   €         “         vph-pwr-regulator            2regulator-fixed         �vph_pwr          À         
        � 9ûÀ        ¨ 9ûÀ         “            	interrupt-parent #address-cells #size-cells model compatible qcom,msm-id qcom,board-id stdout-path #clock-cells clock-frequency clock-output-names phandle device_type reg enable-method cpu-idle-states capacity-dmips-mhz next-level-cache cache-level cpu entry-method idle-state-name arm,psci-suspend-param entry-latency-us exit-latency-us min-residency-us qcom,dload-mode syscon #hwlock-cells remote-endpoint ranges no-map size alloc-ranges qcom,client-id qcom,vmid interrupts qcom,rpm-msg-ram mboxes qcom,glink-channels #power-domain-cells operating-points-v2 opp-level vdd_s1-supply vdd_s2-supply vdd_s3-supply vdd_s4-supply vdd_s5-supply vdd_s6-supply vdd_s7-supply vdd_s8-supply vdd_s9-supply vdd_s10-supply vdd_s11-supply vdd_s12-supply vdd_l2_l26_l28-supply vdd_l3_l11-supply vdd_l4_l27_l31-supply vdd_l5_l7-supply vdd_l6_l12_l32-supply vdd_l8_l16_l30-supply vdd_l25-supply vdd_lvs1_2-supply regulator-name regulator-min-microvolt regulator-max-microvolt regulator-always-on regulator-allow-set-load memory-region hwlocks qcom,smem qcom,local-pid qcom,remote-pid qcom,entry-name #qcom,smem-state-cells interrupt-controller #interrupt-cells clocks clock-names resets reset-names status #phy-cells bits #reset-cells #qcom,sensors interrupt-names #thermal-sensor-cells assigned-clocks assigned-clock-rates reg-names power-domains iommus phys phy-names #sound-dai-cells #stream-id-cells nvmem-cells nvmem-cell-names opp-hz opp-supported-hw gpio-controller gpio-ranges #gpio-cells pins function drive-strength bias-pull-down input-enable bias-disable output-low output-high bias-pull-up qcom,ee qcom,channel mode-bootloader mode-recovery debounce linux,code bus-range num-lanes interrupt-map-mask interrupt-map pinctrl-names pinctrl-0 pinctrl-1 linux,pci-domain freq-table-hz lanes-per-direction vcc-supply vccq-supply vccq2-supply vcc-max-microamp vccq-max-microamp vccq2-max-microamp vdda-phy-supply vdda-pll-supply vdda-phy-max-microamp vdda-pll-max-microamp #global-interrupts #iommu-cells arm,scatter-gather snps,hird-threshold snps,dis_u2_susphy_quirk snps,dis_enblslpm_quirk snps,is-utmi-l1-suspend snps,parkmode-disable-ss-quirk tx-fifo-resize bus-width cd-gpios vmmc-supply vqmmc-supply qcom,controlled-remotely num-channels #dma-cells qcom,num-ees dmas dma-names reset-gpios slim-ifc-dev interrupts-extended qcom,smem-states qcom,smem-state-names label qcom,smd-edge qcom,smd-channels qcom,apr-domain #mbox-cells frame-number #redistributor-regions redistributor-stride polling-delay-passive polling-delay thermal-sensors temperature hysteresis serial0 regulator-boot-on vin-supply 