Ðþí  ;   8  6�   (            ˆ  6X                                                         BeagleBoard BeagleV-Fire          #   !beagle,beaglev-fire microchip,mpfs     cpus                                       , B@   cpu@0             !sifive,e51 sifive,rocket0 riscv          ?cpu          K   @         ^   €         k  @          x          	   |rv64imac             †rv64i         $   •i m a c zicntr zicsr zifencei zihpm          ª             	   ±disabled             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@1         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@2         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@3         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@4         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu-map    cluster0       core0           c         core1           c         core2           c         core3           c         core4           c                  mssrefclk            !fixed-clock         g            tsY@         ¸         syscontroller            !microchip,mpfs-sys-controller           „               ‹   	         ±okay          mssclkclk            !fixed-clock         g            tÄ´          ¸         soc                                   !simple-bus           ¥   cache-controller@2010000          5   !microchip,mpfs-ccache sifive,fu540-c000-ccache cache             x                      M   @        ¬            `            m             ¸        Æ   
        ×                     ¸         clint@2000000         &   !sifive,fu540-c000-clint sifive,clint0            x             À       P  â                                                                  interrupt-controller@c000000          )   !sifive,fu540-c000-plic sifive,plic-1.0.0             x                                     À             Ñ      H  â                  	            	            	            	        ö   º         ¸   
      dma-controller@3000000        !   !microchip,mpfs-pdma sifive,pdma0             x             €         Æ   
         ×               	   
                                  clkcfg@20002000          !microchip,mpfs-clkcfg             x                   >                  ª           g                       ¸         clock-controller@38010000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   ±disabled          clock-controller@38040000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   ±disabled          clock-controller@38100000            !microchip,mpfs-ccc        @   x    8             8              9             9                  g            ±okay             ª                        :  &pll0_ref0 pll0_ref1 pll1_ref0 pll1_ref1 dll0_ref dll1_ref         clock-controller@38400000            !microchip,mpfs-ccc        @   x    8@             8€             9@             9€                 g         	   ±disabled          serial@20000000       	   !ns16550a             x                       2           ?           Æ   
        ×   Z        I Â          ª               ±okay          serial@20100000       	   !ns16550a             x                      2           ?           Æ   
        ×   [        I Â          ª      	         ±okay          serial@20102000       	   !ns16550a             x                      2           ?           Æ   
        ×   \        I Â          ª      
      	   ±disabled          serial@20104000       	   !ns16550a             x     @                2           ?           Æ   
        ×   ]        I Â          ª            	   ±disabled          serial@20106000       	   !ns16550a             x     `                2           ?           Æ   
        ×   ^         ª              I Â       	   ±disabled          mmc@20008000              !microchip,mpfs-sd4hc cdns,sd4hc          x      €                Æ   
        ×   X         ª              WëÂ          ±okay            e            o         z         ‹         �         ª         ¹         Æ         Ó         à      spi@20108000             !microchip,mpfs-spi                                     x     €                Æ   
        ×   6         ª               ±okay          spi@20109000             !microchip,mpfs-spi                                     x     �                Æ   
        ×   7         ª               ±okay          spi@21000000          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    !                  Æ   
        ×   U         ª            	   ±disabled          i2c@2010a000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x                                                Æ   
        ×   :         ª              t †          ±okay          i2c@2010b000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x     °                                          Æ   
        ×   =         ª              t †          ±okay       eeprom@50            !atmel,24c32          x   P      sensor@10            !sony,imx219          x            ª           î           ú                 port       endpoint                                   1    .                can@2010c000             !microchip,mpfs-can           x     À                 ª            %        Æ   
        ×   8      	   ±disabled          can@2010d000             !microchip,mpfs-can           x     Ð                 ª            %        Æ   
        ×   9      	   ±disabled          ethernet@20110000            !microchip,mpfs-macb cdns,macb            x                                                 Æ   
        ×   @   A   B   C   D   E        B                 ª                  
  &pclk hclk           T               ±okay            [sgmii           d      ethernet-phy@0           x             ¸            ethernet@20112000            !microchip,mpfs-macb cdns,macb            x                                                 Æ   
        ×   F   G   H   I   J   K        B                 ª                  
  &pclk hclk           T            	   ±disabled          gpio@20120000            !microchip,mpfs-gpio          x                      Æ   
          Ñ         À            ª               o                 	   ±disabled          gpio@20121000            !microchip,mpfs-gpio          x                     Æ   
          Ñ         À            ª               o                 	   ±disabled          gpio@20122000            !microchip,mpfs-gpio          x                      Æ   
          Ñ         À            ª               o                    ±okay          €  ×   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5   5        ‹         ©  ’P8_PIN3_USER_LED_0 P8_PIN4_USER_LED_1 P8_PIN5_USER_LED_2 P8_PIN6_USER_LED_3 P8_PIN7_USER_LED_4 P8_PIN8_USER_LED_5 P8_PIN9_USER_LED_6 P8_PIN10_USER_LED_7 P8_PIN11_USER_LED_8 P8_PIN12_USER_LED_9 P8_PIN13_USER_LED_10 P8_PIN14_USER_LED_11 P8_PIN15 P8_PIN16 P8_PIN17 P8_PIN18 P8_PIN19 P8_PIN20 P8_PIN21 P8_PIN22 P8_PIN23 P8_PIN24 P8_PIN25 P8_PIN26 P8_PIN27 P8_PIN28 P8_PIN29 P8_PIN30 M2_W_DISABLE1 M2_W_DISABLE2 VIO_ENABLE SD_DET       vio-enable-hog           ¢        Œ               «        ·VIO_ENABLE        sd-det-hog           ¢        Œ               Á        ·SD_DET           rtc@20124000             !microchip,mpfs-rtc           x     @                Æ   
        ×   P   Q         ª            !        &rtc rtcref           ±okay          usb@20201000             !microchip,mpfs-musb          x                      Æ   
        ×   V   W         ª              Çdma mc           ±okay            ×otg       mailbox@37020000             !microchip,mpfs-mailbox        0   x    7         X      1Œ       @    7                Æ   
        ×   `        ß            ±okay             ¸         spi@37020100          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    7                Æ   
        ×   n         ª            ±okay       flash@0          !jedec,spi-nor                                    ë1-         ý            x             ¸   	            fabric-clk3          !fixed-clock         g            túð€         ¸         fabric-clk1          !fixed-clock         g            tsY@      fabric-bus@40000000          !simple-bus                                 x  ¥    @       @               `       `               à       à                                     0       0              gpio@41100000            !microchip,coregpio-rtl-v3            x    A                  ª            o                   ‹         �  ’P8_PIN31 P8_PIN32 P8_PIN33 P8_PIN34 P8_PIN35 P8_PIN36 P8_PIN37 P8_PIN38 P8_PIN39 P8_PIN40 P8_PIN41 P8_PIN42 P8_PIN43 P8_PIN44 P8_PIN45 P8_PIN46       gpio@41200000            !microchip,coregpio-rtl-v3            x    A                   ª            o                   ‹         ´  ’P9_PIN11 P9_PIN12 P9_PIN13 P9_PIN14 P9_PIN15 P9_PIN16 P9_PIN17 P9_PIN18 P9_PIN21 P9_PIN22 P9_PIN23 P9_PIN24 P9_PIN25 P9_PIN26 P9_PIN27 P9_PIN28 P9_PIN29 P9_PIN31 P9_PIN41 P9_PIN42       gpio@44000000            !microchip,coregpio-rtl-v3            x    D                   ª            o                   ‹          ’B0_HSIO70N B0_HSIO71N B0_HSIO83N B0_HSIO73N_C2P_CLKN B0_HSIO70P B0_HSIO71P B0_HSIO83P B0_HSIO73N_C2P_CLKP XCVR1_RX_VALID XCVR1_LOCK XCVR1_ERROR XCVR2_RX_VALID XCVR2_LOCK XCVR2_ERROR XCVR3_RX_VALID XCVR3_LOCK XCVR3_ERROR XCVR_0B_REF_CLK_PLL_LOCK XCVR_0C_REF_CLK_PLL_LOCK B0_HSIO81N             cccrefclk            !fixed-clock         g            túð€         ¸         aliases         /soc/serial@20000000            /soc/serial@20100000            /soc/serial@20102000            &/soc/serial@20104000            ./soc/serial@20106000          chosen          6serial0:115200n8          memory@80000000          ?memory           x    €       @            ±okay          reserved-memory                                   ¥   hss-buffer@103fc00000            !shared-dma-pool          x   ?À       @           B         camera-clk           !fixed-clock         g            tn6          ¸         fixedregulator-0             !regulator-fixed         Iimx219_vana         X *¹€        p *¹€         ¸         fixedregulator-1             !regulator-fixed         Iimx219_vdig         X w@        p w@         ¸         fixedregulator-2             !regulator-fixed         Iimx219_vddl         X O€        p O€         ¸            	#address-cells #size-cells model compatible timebase-frequency device_type i-cache-block-size i-cache-sets i-cache-size reg riscv,isa riscv,isa-base riscv,isa-extensions clocks status phandle #interrupt-cells interrupt-controller d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split next-level-cache cpu #clock-cells clock-frequency mboxes microchip,bitstream-flash ranges cache-level cache-unified interrupt-parent interrupts interrupts-extended riscv,ndev dma-channels #dma-cells #reset-cells clock-names reg-io-width reg-shift current-speed max-frequency bus-width disable-wp cap-sd-highspeed cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 VANA-supply VDIG-supply VDDL-supply data-lanes clock-noncontinuous link-frequencies local-mac-address resets phy-mode phy-handle gpio-controller #gpio-cells ngpios gpio-line-names gpio-hog output-high line-name input interrupt-names dr_mode #mbox-cells spi-max-frequency spi-rx-bus-width serial0 serial1 serial2 serial3 serial4 stdout-path no-map regulator-name regulator-min-microvolt regulator-max-microvolt 