Ðþí  2?   8  .L   (            ó  .                                                         Aries Embedded M100PFEVPS             !aries,m100pfsevp microchip,mpfs    cpus                                       , B@   cpu@0             !sifive,e51 sifive,rocket0 riscv          ?cpu          K   @         ^   €         k  @          x          	   |rv64imac             †rv64i         $   •i m a c zicntr zicsr zifencei zihpm          ª             	   ±disabled             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸   
         cpu@1         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@2         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@3         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu@4         #   !sifive,u54-mc sifive,rocket0 riscv           æ   @         ù   @          €                                 ?cpu          K   @         ^   @         k  €         )           4            ?riscv,sv39           x            |rv64imafdc           †rv64i         (   •i m a f d c zicntr zicsr zifencei zihpm          ª                H        R            ±okay             ¸      interrupt-controller             À            !riscv,cpu-intc            Ñ         ¸            cpu-map    cluster0       core0           c         core1           c         core2           c         core3           c         core4           c                  mssrefclk            !fixed-clock         g            tsY@         ¸         syscontroller            !microchip,mpfs-sys-controller           „                ±okay          mssclkclk            !fixed-clock         g            tÄ´          ¸         soc                                   !simple-bus           ‹   cache-controller@2010000          5   !microchip,mpfs-ccache sifive,fu540-c000-ccache cache             x                      M   @        ’            `            m             ž        ¬   	        ½                     ¸         clint@2000000         &   !sifive,fu540-c000-clint sifive,clint0            x             À       P  È   
      
                                                         interrupt-controller@c000000          )   !sifive,fu540-c000-plic sifive,plic-1.0.0             x                                     À             Ñ      H  È   
               	            	            	            	        Ü   º         ¸   	      dma-controller@3000000        !   !microchip,mpfs-pdma sifive,pdma0             x             €         ¬   	         ½               	   
              ç           ô         clkcfg@20002000          !microchip,mpfs-clkcfg             x                   >                  ª           g           ÿ            ¸         clock-controller@38010000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   ±disabled          clock-controller@38040000            !microchip,mpfs-ccc        @   x    8             8             9             9                 g         	   ±disabled          clock-controller@38100000            !microchip,mpfs-ccc        @   x    8             8              9             9                  g         	   ±disabled          clock-controller@38400000            !microchip,mpfs-ccc        @   x    8@             8€             9@             9€                 g         	   ±disabled          serial@20000000       	   !ns16550a             x                                             ¬   	        ½   Z        # Â          ª            	   ±disabled          serial@20100000       	   !ns16550a             x                                            ¬   	        ½   [        # Â          ª      	         ±okay          serial@20102000       	   !ns16550a             x                                            ¬   	        ½   \        # Â          ª      
         ±okay          serial@20104000       	   !ns16550a             x     @                                      ¬   	        ½   ]        # Â          ª               ±okay          serial@20106000       	   !ns16550a             x     `                                      ¬   	        ½   ^         ª              # Â          ±okay          mmc@20008000              !microchip,mpfs-sd4hc cdns,sd4hc          x      €                ¬   	        ½   X         ª              1úð€         ±okay            ?            I         [         l         u         ‚         �         œ         ª      spi@20108000             !microchip,mpfs-spi                                     x     €                ¬   	        ½   6         ª               ±okay          spi@20109000             !microchip,mpfs-spi                                     x     �                ¬   	        ½   7         ª               ±okay          spi@21000000          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    !                  ¬   	        ½   U         ª               ±okay          i2c@2010a000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x                                                ¬   	        ½   :         ª              t †          ±okay          i2c@2010b000          ,   !microchip,mpfs-i2c microchip,corei2c-rtl-v7          x     °                                          ¬   	        ½   =         ª              t †          ±okay          can@2010c000             !microchip,mpfs-can           x     À                 ª            %        ¬   	        ½   8         ±okay          can@2010d000             !microchip,mpfs-can           x     Ð                 ª            %        ¬   	        ½   9      	   ±disabled          ethernet@20110000            !microchip,mpfs-macb cdns,macb            x                                                 ¬   	        ½   @   A   B   C   D   E        µ                 ª                  
  Çpclk hclk           Ó               ±okay            Úgmii            ã      ethernet-phy@0           x             ¸            ethernet@20112000            !microchip,mpfs-macb cdns,macb            x                                                 ¬   	        ½   F   G   H   I   J   K        µ                 ª                  
  Çpclk hclk           Ó               ±okay            Úgmii            ã      ethernet-phy@0           x             ¸            gpio@20120000            !microchip,mpfs-gpio          x                      ¬   	          Ñ         À            ª               î        þ            ±okay          8  ½                                                  
      pmic-irq-hog                                           mmc-sel-hog                                            gpio@20121000            !microchip,mpfs-gpio          x                     ¬   	          Ñ         À            ª               î        þ         	   ±disabled          gpio@20122000            !microchip,mpfs-gpio          x                      ¬   	          Ñ         À            ª               î        þ            ±okay          €  ½                                                                !   "   #   $   %   &   '   (   )   *   +   ,      rtc@20124000             !microchip,mpfs-rtc           x     @                ¬   	        ½   P   Q         ª            !        Çrtc rtcref           ±okay          usb@20201000             !microchip,mpfs-musb          x                      ¬   	        ½   V   W         ª              ,dma mc           ±okay            <host          mailbox@37020000             !microchip,mpfs-mailbox        0   x    7         X      1Œ       @    7                ¬   	        ½   `        D            ±okay             ¸         spi@37020100          .   !microchip,mpfs-qspi microchip,coreqspi-rtl-v2                                      x    7                ¬   	        ½   n         ª         	   ±disabled             fabric-clk3          !fixed-clock         g            t¹¬          ¸         fabric-clk1          !fixed-clock         g            tsY@         ¸         pcie@2000000000          !microchip,pcie-host-1.0                       À                        ?pci           x                   C                  Pcfg apb         Z               ¬   	        ½   w      `  d                                                                                             r                        ª            
  Çfic0 fic3           ‹                     €           …            �         ±okay             ¸      interrupt-controller                           À             Ñ         ¸            aliases         Ÿ/soc/ethernet@20110000          ©/soc/ethernet@20112000          ³/soc/serial@20000000            »/soc/serial@20100000            Ã/soc/serial@20102000            Ë/soc/serial@20104000            Ó/soc/serial@20106000            Û/soc/gpio@20120000          á/soc/gpio@20122000        chosen          çserial1:115200n8          memory@80000000          ?memory           x    €       @         memory@1040000000            ?memory           x   @       @            	#address-cells #size-cells model compatible timebase-frequency device_type i-cache-block-size i-cache-sets i-cache-size reg riscv,isa riscv,isa-base riscv,isa-extensions clocks status phandle #interrupt-cells interrupt-controller d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split next-level-cache cpu #clock-cells clock-frequency mboxes ranges cache-level cache-unified interrupt-parent interrupts interrupts-extended riscv,ndev dma-channels #dma-cells #reset-cells reg-io-width reg-shift current-speed max-frequency bus-width cap-mmc-highspeed cap-sd-highspeed no-1-8-v sd-uhs-sdr12 sd-uhs-sdr25 sd-uhs-sdr50 sd-uhs-sdr104 disable-wp local-mac-address clock-names resets phy-mode phy-handle gpio-controller #gpio-cells ngpios gpio-hog input output-high interrupt-names dr_mode #mbox-cells reg-names bus-range interrupt-map interrupt-map-mask msi-parent msi-controller ethernet0 ethernet1 serial0 serial1 serial2 serial3 serial4 gpio0 gpio1 stdout-path 