Ðþí  {µ   8  q$   (            
‘  pì                                 milkv,mars starfive,jh7110                                   &Milk-V Mars    cpus                                      , =	    cpu@0             sifive,s7 riscv          ?             Ccpu          O   @         b   @         o  @          |            �rv64imac_zba_zbb             —rv64i         ,   ¦i m a c zba zbb zicntr zicsr zifencei zihpm       	   »disabled             Â      interrupt-controller              riscv,cpu-intc            Ê         ß            Â            cpu@1             sifive,u74-mc riscv          ?            ð   @           @          €                    (   (         Ccpu          O   @         b   @         o  €         3           >   (        Iriscv,sv39           |            �rv64imafdc_zba_zbb           —rv64i         0   ¦i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            Â      interrupt-controller              riscv,cpu-intc            Ê         ß            Â            cpu@2             sifive,u74-mc riscv          ?            ð   @           @          €                    (   (         Ccpu          O   @         b   @         o  €         3           >   (        Iriscv,sv39           |            �rv64imafdc_zba_zbb           —rv64i         0   ¦i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            Â      interrupt-controller              riscv,cpu-intc            Ê         ß            Â            cpu@3             sifive,u74-mc riscv          ?            ð   @           @          €                    (   (         Ccpu          O   @         b   @         o  €         3           >   (        Iriscv,sv39           |            �rv64imafdc_zba_zbb           —rv64i         0   ¦i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            Â      interrupt-controller              riscv,cpu-intc            Ê         ß            Â            cpu@4             sifive,u74-mc riscv          ?            ð   @           @          €                    (   (         Ccpu          O   @         b   @         o  €         3           >   (        Iriscv,sv39           |            �rv64imafdc_zba_zbb           —rv64i         0   ¦i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            Â   	   interrupt-controller              riscv,cpu-intc            Ê         ß            Â            cpu-map    cluster0       core0           �         core1           �         core2           �         core3           �         core4           �   	               opp-table-0           operating-points-v2          ¡         Â      opp-375000000           ¬    ZÀ        ³ 5       opp-500000000           ¬    Íe         ³ 5       opp-750000000           ¬    ,´€        ³ 5       opp-1500000000          ¬    Yh/         ³ Þ€         thermal-zones      cpu-thermal         Á   ú        ×  :˜        å   
   cooling-maps       map0            õ         0  ú   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ         trips      cpu-alert0          	 L          Ð         Jpassive          Â         cpu-crit            	 †           Ð      	   Jcritical                   dvp-clock             fixed-clock          dvp_clk         3            @l÷         Â   9      gmac0-rgmii-rxin-clock            fixed-clock          gmac0_rgmii_rxin            3            @sY@         Â   4      gmac0-rmii-refin-clock            fixed-clock          gmac0_rmii_refin            3            @úð€         Â   3      gmac1-rgmii-rxin-clock            fixed-clock          gmac1_rgmii_rxin            3            @sY@         Â   '      gmac1-rmii-refin-clock            fixed-clock          gmac1_rmii_refin            3            @úð€         Â   &      hdmitx0-pixel-clock           fixed-clock          hdmitx0_pixelclk            3            @³Ü@         Â   <      i2srx-bclk-ext-clock              fixed-clock          i2srx_bclk_ext          3            @ »€          Â         i2srx-lrck-ext-clock              fixed-clock          i2srx_lrck_ext          3            @ î          Â         i2stx-bclk-ext-clock              fixed-clock          i2stx_bclk_ext          3            @ »€          Â   #      i2stx-lrck-ext-clock              fixed-clock          i2stx_lrck_ext          3            @ î          Â   $      mclk-ext-clock            fixed-clock       	   mclk_ext            3            @ »€          Â         oscillator            fixed-clock          osc         3            @n6          Â          rtc-oscillator            fixed-clock          rtc_osc         3            @  €          Â   5      stmmac-axi-config            P        \           l           |      €   @                         Â   0      tdm-ext-clock             fixed-clock          tdm_ext         3            @î           Â         soc           simple-bus          †                                    —   timer@2000000         $    starfive,jh7110-clint sifive,clint0          ?                    P  ž                                                                  cache-controller@2010000          ,    starfive,jh7110-ccache sifive,ccache0 cache          ?            @         ²                     Q   @        ½            d            q             É         Â         interrupt-controller@c000000          '    starfive,jh7110-plic sifive,plic-1.0.0           ?                    H  ž                  	            	            	            	          Ê         ß                        ×   ˆ         Â         serial@10000000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                      p      ’      ‘        wbaudclk apb_pclk            â      S      T        ²            é           ö            »okay             default                  serial@10010000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p      ”      “        wbaudclk apb_pclk            â      U      V        ²   !        é           ö         	   »disabled          serial@10020000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p      –      •        wbaudclk apb_pclk            â      W      X        ²   "        é           ö         	   »disabled          i2c@10030000              snps,designware-i2c          ?                     p      Š        wref         â      L        ²   #                                  »okay            @ †           ,        -  þ        E  þ         default                  i2c@10040000              snps,designware-i2c          ?                     p      ‹        wref         â      M        ²   $                               	   »disabled          i2c@10050000              snps,designware-i2c          ?                     p      Œ        wref         â      N        ²   %                                  »okay            @ †           ,        -  þ        E  þ         default                  spi@10060000              arm,pl022 arm,primecell          ?                     p      ƒ      ƒ        wsspclk apb_pclk         â      E        ²   &        ] "        t                                     »okay             default               spi@0             rohm,dh2228fv            ?            { ˜–€         spi@10070000              arm,pl022 arm,primecell          ?                     p      „      „        wsspclk apb_pclk         â      F        ²   '        ] "        t                                  	   »disabled          spi@10080000              arm,pl022 arm,primecell          ?                     p      …      …        wsspclk apb_pclk         â      G        ²   (        ] "        t                                  	   »disabled          tdm@10090000              starfive,jh7110-tdm          ?    	               ,  p      ¸      ¹      º      »               4  wtdm_ahb tdm_apb tdm_internal tdm mclk_inner tdm_ext         â      i      k      j        �                    ’rx tx           œ          	   »disabled          i2s@100e0000              starfive,jh7110-i2srx            ?                   <  p      °      ¯                     ³      µ            @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext         â      c      d        �                  ’tx rx           ­                 œ          	   »disabled          pwmdac@100b0000           starfive,jh7110-pwmdac           ?                     p      �      ž      	  wapb core            â      `        �              ’tx          œ             »okay             default                     Â   D      usb@10100000              starfive,jh7110-usb         —                                             ½            (  p                                      wlpm stb apb axi utmi_apb             â      
                  	        Ñpwrup apb axi utmi_apb           »okay            Ýperipheral     usb@0         
    cdns,usb3            ?                           åotg xhci dev            ²   d   l   n        ïhost peripheral otg         ÿ           cdns3,usb2-phy           phy@10200000              starfive,jh7110-usb-phy          ?                      p      _              w125m app_125m                        Â         phy@10210000              starfive,jh7110-pcie-phy             ?    !                              Â   >      phy@10220000              starfive,jh7110-pcie-phy             ?    "                              Â   A      clock-controller@10230000             starfive,jh7110-stgcrg           ?    #               <  p          6            _            7                  H  wosc hifi4_core stg_axiahb usb_125m cpu_bus hifi4_axi nocstg_bus apb_bus         3                       Â         syscon@10240000       "    starfive,jh7110-stg-syscon syscon            ?    $                  Â         serial@12000000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                      p      ˜      —        wbaudclk apb_pclk            â      Y      Z        ²   -        é           ö         	   »disabled          serial@12010000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p      š      ™        wbaudclk apb_pclk            â      [      \        ²   .        é           ö         	   »disabled          serial@12020000       &    starfive,jh7110-uart snps,dw-apb-uart            ?                     p      œ      ›        wbaudclk apb_pclk            â      ]      ^        ²   /        é           ö         	   »disabled          i2c@12030000              snps,designware-i2c          ?                     p      �        wref         â      O        ²   0                               	   »disabled          i2c@12040000              snps,designware-i2c          ?                     p      Ž        wref         â      P        ²   1                               	   »disabled          i2c@12050000              snps,designware-i2c          ?                     p      �        wref         â      Q        ²   2                                  »okay            @ †           ,        -  þ        E  þ         default            !   pmic@36           x-powers,axp15060            ?   6          Ê         ß      regulators     dcdc1            &         8        L 2Z         d 2Z         |vcc_3v3          Â   +      dcdc2            8        L ¡         d          |vdd-cpu          Â         aldo4            &         8        L w@        d 2Z       	  |emmc_vdd             Â   ,               i2c@12060000              snps,designware-i2c          ?                     p      �        wref         â      R        ²   3                                  »okay            @ †           ,        -  þ        E  þ         default            "      spi@12070000              arm,pl022 arm,primecell          ?                     p      †      †        wsspclk apb_pclk         â      H        ²   4        ] "        t                                  	   »disabled          spi@12080000              arm,pl022 arm,primecell          ?                     p      ‡      ‡        wsspclk apb_pclk         â      I        ²   5        ] "        t                                  	   »disabled          spi@12090000              arm,pl022 arm,primecell          ?    	                 p      ˆ      ˆ        wsspclk apb_pclk         â      J        ²   6        ] "        t                                  	   »disabled          spi@120a0000              arm,pl022 arm,primecell          ?    
                 p      ‰      ‰        wsspclk apb_pclk         â      K        ²   7        ] "        t                                  	   »disabled          i2s@120b0000              starfive,jh7110-i2stx0           ?                   $  p      ¢      ¡                     $  wi2sclk apb mclk mclk_inner mclk_ext         â      e      f        �      /        ’tx          œ          	   »disabled          i2s@120c0000              starfive,jh7110-i2stx1           ?                   <  p      ©      ¨                     ¬      ®   #   $      @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext         â      g      h        �      0        ’tx          œ          	   »disabled          pwm@120d0000          %    starfive,jh7110-pwm opencores,pwm-v1             ?                     p      y        â      l        ‹            »okay             default            %      temperature-sensor@120e0000           starfive,jh7110-temp             ?                     p      ‚      �      
  wsense bus           â      |      {      
  Ñsense bus           –             Â   
      spi@13010000          #    starfive,jh7110-qspi cdns,qspi-nor            ?                 !        @          ²           p      Z      W      X        wref ahb apb         â      >      =      ?        Ñqspi qspi-ocp rstc_ref          ¬           ¼           Ì             »okay                                flash@0           jedec,spi-nor            ?            á           { ·         ñ           ÿ                            partitions            fixed-partitions                               spl@0            ?             uboot-env@f0000          ?            uboot@100000             ?    ð                 clock-controller@13020000             starfive,jh7110-syscrg           ?                   <  p       &   '   #   $               (       (      (         Ž  wosc gmac1_rmii_refin gmac1_rgmii_rxin i2stx_bclk_ext i2stx_lrck_ext i2srx_bclk_ext i2srx_lrck_ext tdm_ext mclk_ext pll0_out pll1_out pll2_out           3                      )         (            9Íe Yh/          Â         syscon@13030000       -    starfive,jh7110-sys-syscon syscon simple-mfd             ?                      Â      clock-controller              starfive,jh7110-pll         p            3            Â   (         pinctrl@13040000              starfive,jh7110-sys-pinctrl          ?                     p      p        â              ²   V          Ê         ß            N        ^            Â   -   i2c0-0           Â      i2c-pins            j	 9
 :         q         ~         ‹         i2c2-0           Â      i2c-pins            j; x< |         q         ~         ‹         i2c5-0           Â   !   i2c-pins            jO ¨P ¬         q         ~         ‹         i2c6-0           Â   "   i2c-pins            jV ¸W ¼         q         ~         ‹         mmc0-0           Â   *   rst-pins            jÿ >                  ­            ¼         Ê        à          mmc-pins          (  j  @  A  B  C  D  E  F  G  H  I                  ­            ~         mmc1-0           Â   .   clk-pins            jÿ7 
                  ­            ¼         Ê        à          mmc-pins            j,9L	-:P.;T/<X0=\                  ­            ~         ‹        à             pcie0-0          Â   ?   clkreq-pins         jÿ          ê        ­            ~         Ê        à          wake-pins           jÿ                    ­            ~         Ê        à             pcie1-0          Â   B   clkreq-pins         jÿ          ê        ­            ~         Ê        à          wake-pins           jÿ                   ­            ~         Ê        à             pwmdac-0             Â      pwmdac-pins         jÿ !ÿ "         q        ­            ¼         Ê        à             pwm-0            Â   %   pwm-pins            jÿ$.ÿ(;         q        ­            ¼         Ê        à             spi0-0           Â      mosi-pins           jÿ  4         q         ¼         Ê      miso-pins           j 5                   ~         ‹      sck-pins            j 0         q         ¼         Ê      ss-pins         j 1         q         ¼         Ê         uart0-0          Â      tx-pins         jÿ          q        ­            ¼         Ê        à          rx-pins         j          q        ­            ~         ‹        à                watchdog@13070000             starfive,jh7110-wdt          ?                     p      z      {      	  wapb core            â      m      n      crypto@16000000           starfive,jh7110-crypto           ?             @         p                  	  whclk ahb            ²           â              �   )         )               ’tx rx         dma-controller@16008000           arm,pl080 arm,primecell         ] €         ?     €       @         ²           p            	  wapb_pclk            â               ù                 '           9            J            Â   )      rng@1600c000              starfive,jh7110-trng             ?     À       @         p                  	  whclk ahb            â              ²         mmc@16010000              starfive,jh7110-mmc          ?                     p      [      ]        wbiu ciu         â      @        Ñreset           ²   J        ±             U        l            v         |            »okay            õá         )      ]        9úð€        @            †         ˜         ¥         ´        Å   È         default            *        Ü   +        è   ,      mmc@16020000              starfive,jh7110-mmc          ?                     p      \      ^        wbiu ciu         â      A        Ñreset           ²   K        ±             U        l            v      œ      >         »okay            õá         )      ^        9úð€        @            õ         ý           -   )                             Å   È         default            .      ethernet@16030000         &    starfive,jh7110-dwmac snps,dwmac-5.20            ?                   (  p   /      /         m   /         o        wstmmaceth pclk ptp_ref tx gtx           â   /       /           Ñstmmaceth ahb           ²                 ïmacirq eth_wake_irq eth_lpi         )           7           E   @        `            |         �         œ        ·   0         Ç         Ð        ë           ö           ­   1               »okay               2      	  rgmii-id                     )   /           /   /      mdio                                       snps,dwmac-mdio    ethernet-phy@0           ?             F         c         €         ž        ½  ‚        Û  ^        ú  Ü        	  Ü         Â   2            ethernet@16040000         &    starfive,jh7110-dwmac snps,dwmac-5.20            ?                   (  p      b      a      f      j      k        wstmmaceth pclk ptp_ref tx gtx           â      B      C        Ñstmmaceth ahb           ²   N   M   L        ïmacirq eth_wake_irq eth_lpi         )           7           E   @        `            |         �         œ        ·   0         Ç         Ð        ë           ö           ­      �         	   »disabled          dma-controller@16050000           starfive,jh7110-axi-dma          ?                     p                    wcore-clk cfgr-clk           â                    ²   I        J           	$           	1           	B           	R                    	b                     	p            Â         clock-controller@17000000             starfive,jh7110-aoncrg           ?                    (  p       3   4                  l   5      N  wosc gmac0_rmii_refin gmac0_rgmii_rxin stg_axiahb apb_bus gmac0_gtxclk rtc_osc           3                       Â   /      syscon@17010000       "    starfive,jh7110-aon-syscon syscon            ?                     	‡            Â   1      pinctrl@17020000              starfive,jh7110-aon-pinctrl          ?                     â   /           ²   U          Ê         ß            N        ^         power-controller@17030000             starfive,jh7110-pmu          ?                     ²   o        	‡            Â   :      csi@19800000          #    starfive,jh7110-csi2rx cdns,csi2rx           ?    €               0  p   6      6      6      6   	   6   
   6         F  wsys_clk p_clk pixel_if0_clk pixel_if1_clk pixel_if2_clk pixel_if3_clk         0  â   6   	   6      6      6      6      6         5  Ñsys reg_bank pixel_if0 pixel_if1 pixel_if2 pixel_if3            ÿ   7        dphy          	   »disabled            )   6           9³Ü@   ports                               port@0           ?          port@1           ?      endpoint            	›   8         Â   ;               clock-controller@19810000             starfive,jh7110-ispcrg           ?    �                 p      3      4      5   9      1  wisp_top_core isp_top_axi noc_bus_isp_axi dvp_clk            â      )      *              3                      	«   :            Â   6      phy@19820000              starfive,jh7110-dphy-rx          ?    ‚                 p   6      6      6           wcfg ref tx          â   6      6           	«   1                        Â   7      isp@19840000              starfive,jh7110-camss             ?    „             ‡                 åsyscon isp        8  p   6       6      6      6      6         3      4      E  wapb_func wrapper_clk_c dvp_inv axiwr mipi_rx0_pxl ispcore_2x isp_axi          0  â   6       6      6   
   6         )      *      6  Ñwrapper_p wrapper_c axird axiwr isp_top_n isp_top_axi           	«   :           ²   \   W   Z   X      	   »disabled            )   6       6           9óO`Í=€   ports                               port@0           ?          port@1           ?      endpoint            	›   ;         Â   8               clock-controller@295c0000             starfive,jh7110-voutcrg          ?    )\               ,  p      :      =      >      ?      ¥   <      V  wvout_src vout_top_ahb vout_top_axi vout_top_hdmitx0_mclk i2stx0_bclk hdmitx0_pixelclk           â      +        3                      	«   :         pcie@940000000            starfive,jh7110-pcie              ?   	@              +                  åcfg apb         	¹                                     ß         8  —‚       0       0          Ã      	       	        @           ²   8        	Ê                     `  	Ý                  =                     =                     =                     =            	ë         Cpci         ½           	ú       ÿ         p      `      
            	        wnoc tl axi_mst0 apb       0  â                                            Ñmst0 slv0 slv brg core apb           »okay            
   -              ÿ   >         default            ?   interrupt-controller                          ß             Ê         Â   =         pcie@9c0000000            starfive,jh7110-pcie              ?   	À              ,                  åcfg apb         	¹                                    ß         8  —‚       8       8          Ã      	€      	€       @           ²   9        	Ê                     `  	Ý                  @                     @                     @                     @            	ë         Cpci         ½           	ú       ÿ         p      `                          wnoc tl axi_mst0 apb       0  â                                            Ñmst0 slv0 slv brg core apb           »okay            
   -              ÿ   A         default            B   interrupt-controller                          ß             Ê         Â   @            aliases         
/soc/ethernet@16030000          
/soc/i2c@10030000           
/soc/i2c@10050000           
$/soc/i2c@12050000           
)/soc/i2c@12060000           
./soc/mmc@16010000           
3/soc/mmc@16020000           
8/soc/serial@10000000          chosen          
@serial0:115200n8          memory@40000000          Cmemory           ?    @                gpio-restart              gpio-restart               -   #            	g   à      audio-codec           linux,spdif-dit         œ             Â   E      sound             simple-audio-card           
LStarFive-PWMDAC-Sound-Card                              simple-audio-card,dai-link@0             ?            
cleft_j          
j   C        
z   C   cpu         
‡   D         Â   C      codec           
‡   E               	compatible #address-cells #size-cells model timebase-frequency reg device_type i-cache-block-size i-cache-sets i-cache-size next-level-cache riscv,isa riscv,isa-base riscv,isa-extensions status phandle interrupt-controller #interrupt-cells d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split operating-points-v2 clocks clock-names #cooling-cells cpu-supply cpu opp-shared opp-hz opp-microvolt polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis clock-output-names #clock-cells clock-frequency snps,lpi_en snps,wr_osr_lmt snps,rd_osr_lmt snps,blen interrupt-parent ranges interrupts-extended interrupts cache-level cache-unified riscv,ndev resets reg-io-width reg-shift pinctrl-names pinctrl-0 i2c-sda-hold-time-ns i2c-sda-falling-time-ns i2c-scl-falling-time-ns arm,primecell-periphid num-cs spi-max-frequency dmas dma-names #sound-dai-cells starfive,syscon starfive,stg-syscon reset-names dr_mode reg-names interrupt-names phys phy-names #phy-cells #reset-cells regulator-boot-on regulator-always-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #thermal-sensor-cells cdns,fifo-depth cdns,fifo-width cdns,trigger-address cdns,read-delay cdns,tshsl-ns cdns,tsd2d-ns cdns,tchsh-ns cdns,tslch-ns assigned-clocks assigned-clock-rates gpio-controller #gpio-cells pinmux bias-disable input-enable input-schmitt-enable bias-pull-up drive-strength input-disable input-schmitt-disable slew-rate bias-pull-down lli-bus-interface-ahb1 mem-bus-interface-ahb1 memcpy-burst-size memcpy-bus-width #dma-cells fifo-watermark-aligned data-addr starfive,sysreg cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v cap-mmc-hw-reset post-power-on-delay-ms vmmc-supply vqmmc-supply no-sdio no-mmc cd-gpios disable-wp cap-sd-highspeed rx-fifo-depth tx-fifo-depth snps,multicast-filter-bins snps,perfect-filter-entries snps,fixed-burst snps,no-pbl-x8 snps,force_thresh_dma_mode snps,axi-config snps,tso snps,en-tx-lpi-clockgating snps,txpbl snps,rxpbl phy-handle phy-mode starfive,tx-use-rgmii-clk assigned-clock-parents motorcomm,tx-clk-adj-enabled motorcomm,tx-clk-10-inverted motorcomm,tx-clk-100-inverted motorcomm,tx-clk-1000-inverted motorcomm,rx-clk-drv-microamp motorcomm,rx-data-drv-microamp rx-internal-delay-ps tx-internal-delay-ps dma-channels snps,dma-masters snps,data-width snps,block-size snps,priority snps,axi-max-burst-len #power-domain-cells remote-endpoint power-domains linux,pci-domain interrupt-map-mask interrupt-map msi-controller bus-range perst-gpios ethernet0 i2c0 i2c2 i2c5 i2c6 mmc0 mmc1 serial0 stdout-path simple-audio-card,name format bitclock-master frame-master sound-dai 