Ðþí  “   8  …¨   (            `  …p                             ,    starfive,visionfive-2-v1.2a starfive,jh7110                                  &StarFive VisionFive 2 v1.2A    cpus                                      , =	          ?   G   cpu@0             sifive,s7 riscv          G             Kcpu          W   @         j   @         w  @          „            •rv64imac_zba_zbb             Ÿrv64i         ,   ®i m a c zba zbb zicntr zicsr zifencei zihpm       	   Ãdisabled             ?      interrupt-controller              riscv,cpu-intc            Ê         ß            ?            cpu@1             sifive,u74-mc riscv          G            ð   @           @          €                    (   (         Kcpu          W   @         j   @         w  €         3           >   (        Iriscv,sv39           „            •rv64imafdc_zba_zbb           Ÿrv64i         0   ®i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            ?      interrupt-controller              riscv,cpu-intc            Ê         ß            ?            cpu@2             sifive,u74-mc riscv          G            ð   @           @          €                    (   (         Kcpu          W   @         j   @         w  €         3           >   (        Iriscv,sv39           „            •rv64imafdc_zba_zbb           Ÿrv64i         0   ®i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            ?      interrupt-controller              riscv,cpu-intc            Ê         ß            ?            cpu@3             sifive,u74-mc riscv          G            ð   @           @          €                    (   (         Kcpu          W   @         j   @         w  €         3           >   (        Iriscv,sv39           „            •rv64imafdc_zba_zbb           Ÿrv64i         0   ®i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            ?      interrupt-controller              riscv,cpu-intc            Ê         ß            ?            cpu@4             sifive,u74-mc riscv          G            ð   @           @          €                    (   (         Kcpu          W   @         j   @         w  €         3           >   (        Iriscv,sv39           „            •rv64imafdc_zba_zbb           Ÿrv64i         0   ®i m a f d c zba zbb zicntr zicsr zifencei zihpm          R        \           p              wcpu         ƒ           ’            ?   	   interrupt-controller              riscv,cpu-intc            Ê         ß            ?            cpu-map    cluster0       core0           �         core1           �         core2           �         core3           �         core4           �   	               opp-table-0           operating-points-v2          ¡         ?      opp-375000000           ¬    ZÀ        ³ 5       opp-500000000           ¬    Íe         ³ 5       opp-750000000           ¬    ,´€        ³ 5       opp-1500000000          ¬    Yh/         ³ Þ€         thermal-zones      cpu-thermal         Á   ú        ×  :˜        å   
   cooling-maps       map0            õ         0  ú   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   ÿÿÿÿÿÿÿÿ   	ÿÿÿÿÿÿÿÿ         trips      cpu-alert0          	 L          Ð         Rpassive          ?         cpu-crit            	 †           Ð      	   Rcritical                   dvp-clock             fixed-clock          dvp_clk         3            @l÷         ?   :      gmac0-rgmii-rxin-clock            fixed-clock          gmac0_rgmii_rxin            3            @sY@         ?   5      gmac0-rmii-refin-clock            fixed-clock          gmac0_rmii_refin            3            @úð€         ?   4      gmac1-rgmii-rxin-clock            fixed-clock          gmac1_rgmii_rxin            3            @sY@         ?   '      gmac1-rmii-refin-clock            fixed-clock          gmac1_rmii_refin            3            @úð€         ?   &      hdmitx0-pixel-clock           fixed-clock          hdmitx0_pixelclk            3            @³Ü@         ?   =      i2srx-bclk-ext-clock              fixed-clock          i2srx_bclk_ext          3            @ »€          ?         i2srx-lrck-ext-clock              fixed-clock          i2srx_lrck_ext          3            @ î          ?         i2stx-bclk-ext-clock              fixed-clock          i2stx_bclk_ext          3            @ »€          ?   #      i2stx-lrck-ext-clock              fixed-clock          i2stx_lrck_ext          3            @ î          ?   $      mclk-ext-clock            fixed-clock       	   mclk_ext            3            @ »€          ?         oscillator            fixed-clock          osc         3            @n6          ?          rtc-oscillator            fixed-clock          rtc_osc         3            @  €          ?   6      stmmac-axi-config            P        \           l           |      €   @                         ?   0      tdm-ext-clock             fixed-clock          tdm_ext         3            @î           ?         soc           simple-bus          †                                    —   timer@2000000         $    starfive,jh7110-clint sifive,clint0          G                    P  ž                                                                     ?   H      cache-controller@2010000          ,    starfive,jh7110-ccache sifive,ccache0 cache          G            @         ²                     Y   @        ½            l            y             É         ?         interrupt-controller@c000000          '    starfive,jh7110-plic sifive,plic-1.0.0           G                    H  ž                  	            	            	            	          Ê         ß                        ×   ˆ         ?         serial@10000000       &    starfive,jh7110-uart snps,dw-apb-uart            G                      p      ’      ‘        wbaudclk apb_pclk            â      S      T        ²            é           ö            Ãokay             default                     ?   I      serial@10010000       &    starfive,jh7110-uart snps,dw-apb-uart            G                     p      ”      “        wbaudclk apb_pclk            â      U      V        ²   !        é           ö         	   Ãdisabled             ?   J      serial@10020000       &    starfive,jh7110-uart snps,dw-apb-uart            G                     p      –      •        wbaudclk apb_pclk            â      W      X        ²   "        é           ö         	   Ãdisabled             ?   K      i2c@10030000              snps,designware-i2c          G                     p      Š        wref         â      L        ²   #                                  Ãokay            @ †           ,        -  þ        E  þ         default                     ?   L      i2c@10040000              snps,designware-i2c          G                     p      ‹        wref         â      M        ²   $                               	   Ãdisabled             ?   M      i2c@10050000              snps,designware-i2c          G                     p      Œ        wref         â      N        ²   %                                  Ãokay            @ †           ,        -  þ        E  þ         default                     ?   N      spi@10060000              arm,pl022 arm,primecell          G                     p      ƒ      ƒ        wsspclk apb_pclk         â      E        ²   &        ] "        t                                     Ãokay             default                     ?   O   spi@0             rohm,dh2228fv            G            { ˜–€         ?   P         spi@10070000              arm,pl022 arm,primecell          G                     p      „      „        wsspclk apb_pclk         â      F        ²   '        ] "        t                                  	   Ãdisabled             ?   Q      spi@10080000              arm,pl022 arm,primecell          G                     p      …      …        wsspclk apb_pclk         â      G        ²   (        ] "        t                                  	   Ãdisabled             ?   R      tdm@10090000              starfive,jh7110-tdm          G    	               ,  p      ¸      ¹      º      »               4  wtdm_ahb tdm_apb tdm_internal tdm mclk_inner tdm_ext         â      i      k      j        �                    ’rx tx           œ          	   Ãdisabled             ?   S      i2s@100e0000              starfive,jh7110-i2srx            G                   <  p      °      ¯                     ³      µ            @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext         â      c      d        �                  ’tx rx           ­                 œ          	   Ãdisabled             ?   T      pwmdac@100b0000           starfive,jh7110-pwmdac           G                     p      �      ž      	  wapb core            â      `        �              ’tx          œ             Ãokay             default                     ?   E      usb@10100000              starfive,jh7110-usb         —                                             ½            (  p                                      wlpm stb apb axi utmi_apb             â      
                  	        Ñpwrup apb axi utmi_apb           Ãokay            Ýperipheral           ?   U   usb@0         
    cdns,usb3            G                           åotg xhci dev            ²   d   l   n        ïhost peripheral otg         ÿ           cdns3,usb2-phy           ?   V         phy@10200000              starfive,jh7110-usb-phy          G                      p      _              w125m app_125m                        ?         phy@10210000              starfive,jh7110-pcie-phy             G    !                              ?   ?      phy@10220000              starfive,jh7110-pcie-phy             G    "                              ?   B      clock-controller@10230000             starfive,jh7110-stgcrg           G    #               <  p          6            _            7                  H  wosc hifi4_core stg_axiahb usb_125m cpu_bus hifi4_axi nocstg_bus apb_bus         3                       ?         syscon@10240000       "    starfive,jh7110-stg-syscon syscon            G    $                  ?         serial@12000000       &    starfive,jh7110-uart snps,dw-apb-uart            G                      p      ˜      —        wbaudclk apb_pclk            â      Y      Z        ²   -        é           ö         	   Ãdisabled             ?   W      serial@12010000       &    starfive,jh7110-uart snps,dw-apb-uart            G                     p      š      ™        wbaudclk apb_pclk            â      [      \        ²   .        é           ö         	   Ãdisabled             ?   X      serial@12020000       &    starfive,jh7110-uart snps,dw-apb-uart            G                     p      œ      ›        wbaudclk apb_pclk            â      ]      ^        ²   /        é           ö         	   Ãdisabled             ?   Y      i2c@12030000              snps,designware-i2c          G                     p      �        wref         â      O        ²   0                               	   Ãdisabled             ?   Z      i2c@12040000              snps,designware-i2c          G                     p      Ž        wref         â      P        ²   1                               	   Ãdisabled             ?   [      i2c@12050000              snps,designware-i2c          G                     p      �        wref         â      Q        ²   2                                  Ãokay            @ †           ,        -  þ        E  þ         default            !         ?   \   pmic@36           x-powers,axp15060            G   6          Ê         ß            ?   ]   regulators     dcdc1            &         8        L 2Z         d 2Z         |vcc_3v3          ?   +      dcdc2            8        L ¡         d          |vdd-cpu          ?         aldo4            &         8        L w@        d 2Z       	  |emmc_vdd             ?   ,               i2c@12060000              snps,designware-i2c          G                     p      �        wref         â      R        ²   3                                  Ãokay            @ †           ,        -  þ        E  þ         default            "         ?   ^      spi@12070000              arm,pl022 arm,primecell          G                     p      †      †        wsspclk apb_pclk         â      H        ²   4        ] "        t                                  	   Ãdisabled             ?   _      spi@12080000              arm,pl022 arm,primecell          G                     p      ‡      ‡        wsspclk apb_pclk         â      I        ²   5        ] "        t                                  	   Ãdisabled             ?   `      spi@12090000              arm,pl022 arm,primecell          G    	                 p      ˆ      ˆ        wsspclk apb_pclk         â      J        ²   6        ] "        t                                  	   Ãdisabled             ?   a      spi@120a0000              arm,pl022 arm,primecell          G    
                 p      ‰      ‰        wsspclk apb_pclk         â      K        ²   7        ] "        t                                  	   Ãdisabled             ?   b      i2s@120b0000              starfive,jh7110-i2stx0           G                   $  p      ¢      ¡                     $  wi2sclk apb mclk mclk_inner mclk_ext         â      e      f        �      /        ’tx          œ          	   Ãdisabled             ?   c      i2s@120c0000              starfive,jh7110-i2stx1           G                   <  p      ©      ¨                     ¬      ®   #   $      @  wi2sclk apb mclk mclk_inner mclk_ext bclk lrck bclk_ext lrck_ext         â      g      h        �      0        ’tx          œ          	   Ãdisabled             ?   d      pwm@120d0000          %    starfive,jh7110-pwm opencores,pwm-v1             G                     p      y        â      l        ‹            Ãokay             default            %         ?   e      temperature-sensor@120e0000           starfive,jh7110-temp             G                     p      ‚      �      
  wsense bus           â      |      {      
  Ñsense bus           –             ?   
      spi@13010000          #    starfive,jh7110-qspi cdns,qspi-nor            G                 !        @          ²           p      Z      W      X        wref ahb apb         â      >      =      ?        Ñqspi qspi-ocp rstc_ref          ¬           ¼           Ì             Ãokay                                      ?   f   flash@0           jedec,spi-nor            G            á           { ·         ñ           ÿ                                  ?   g   partitions            fixed-partitions                               spl@0            G             uboot-env@f0000          G            uboot@100000             G    ð                 clock-controller@13020000             starfive,jh7110-syscrg           G                   <  p       &   '   #   $               (       (      (         Ž  wosc gmac1_rmii_refin gmac1_rgmii_rxin i2stx_bclk_ext i2stx_lrck_ext i2srx_bclk_ext i2srx_lrck_ext tdm_ext mclk_ext pll0_out pll1_out pll2_out           3                      )         (            9Íe Yh/          ?         syscon@13030000       -    starfive,jh7110-sys-syscon syscon simple-mfd             G                      ?      clock-controller              starfive,jh7110-pll         p            3            ?   (         pinctrl@13040000              starfive,jh7110-sys-pinctrl          G                     p      p        â              ²   V          Ê         ß            N        ^            ?   -   i2c0-0           ?      i2c-pins            j	 9
 :         q         ~         ‹         i2c2-0           ?      i2c-pins            j; x< |         q         ~         ‹         i2c5-0           ?   !   i2c-pins            jO ¨P ¬         q         ~         ‹         i2c6-0           ?   "   i2c-pins            jV ¸W ¼         q         ~         ‹         mmc0-0           ?   *   rst-pins            jÿ >                  ­            ¼         Ê        à          mmc-pins          (  j  @  A  B  C  D  E  F  G  H  I                  ­            ~         mmc1-0           ?   .   clk-pins            jÿ7 
                  ­            ¼         Ê        à          mmc-pins            j,9L	-:P.;T/<X0=\                  ­            ~         ‹        à             pcie0-0          ?   @   clkreq-pins         jÿ          ê        ­            ~         Ê        à          wake-pins           jÿ                    ­            ~         Ê        à             pcie1-0          ?   C   clkreq-pins         jÿ          ê        ­            ~         Ê        à          wake-pins           jÿ                   ­            ~         Ê        à             pwmdac-0             ?      pwmdac-pins         jÿ !ÿ "         q        ­            ¼         Ê        à             pwm-0            ?   %   pwm-pins            jÿ$.ÿ(;         q        ­            ¼         Ê        à             spi0-0           ?      mosi-pins           jÿ  4         q         ¼         Ê      miso-pins           j 5                   ~         ‹      sck-pins            j 0         q         ¼         Ê      ss-pins         j 1         q         ¼         Ê         uart0-0          ?      tx-pins         jÿ          q        ­            ¼         Ê        à          rx-pins         j          q        ­            ~         ‹        à                watchdog@13070000             starfive,jh7110-wdt          G                     p      z      {      	  wapb core            â      m      n      crypto@16000000           starfive,jh7110-crypto           G             @         p                  	  whclk ahb            ²           â              �   )         )               ’tx rx            ?   h      dma-controller@16008000           arm,pl080 arm,primecell         ] €         G     €       @         ²           p            	  wapb_pclk            â               ù                 '           9            J            ?   )      rng@1600c000              starfive,jh7110-trng             G     À       @         p                  	  whclk ahb            â              ²            ?   i      mmc@16010000              starfive,jh7110-mmc          G                     p      [      ]        wbiu ciu         â      @        Ñreset           ²   J        ±             U        l            v         |            Ãokay            õá         )      ]        9úð€        @            †         ˜         ¥         ´        Å   È         default            *        Ü   +        è   ,         õ         ?   j      mmc@16020000              starfive,jh7110-mmc          G                     p      \      ^        wbiu ciu         â      A        Ñreset           ²   K        ±             U        l            v      œ      >         Ãokay            õá         )      ^        9úð€        @                                -   )                     &        Å   È         default            .         ?   k      ethernet@16030000         &    starfive,jh7110-dwmac snps,dwmac-5.20            G                   (  p   /      /         m   /         o        wstmmaceth pclk ptp_ref tx gtx           â   /       /           Ñstmmaceth ahb           ²                 ïmacirq eth_wake_irq eth_lpi         7           E           S   @        n            Š         ›         ª        Å   0         Õ         Þ        ù                      ­   1               Ãokay               2      	  rgmii-id             ?   l   mdio                                       snps,dwmac-mdio    ethernet-phy@0           G            #  l        8  F         ?   2            ethernet@16040000         &    starfive,jh7110-dwmac snps,dwmac-5.20            G                   (  p      b      a      f      j      k        wstmmaceth pclk ptp_ref tx gtx           â      B      C        Ñstmmaceth ahb           ²   N   M   L        ïmacirq eth_wake_irq eth_lpi         7           E           S   @        n            Š         ›         ª        Å   0         Õ         Þ        ù                      ­      �            Ãokay               3        rmii            )      i      g        M      e      e         ?   m   mdio                                       snps,dwmac-mdio    ethernet-phy@1           G             ?   3            dma-controller@16050000           starfive,jh7110-axi-dma          G                     p                    wcore-clk cfgr-clk           â                    ²   I        J           d           q           ‚           ’                    ¢                     °            ?         clock-controller@17000000             starfive,jh7110-aoncrg           G                    (  p       4   5                  l   6      N  wosc gmac0_rmii_refin gmac0_rgmii_rxin stg_axiahb apb_bus gmac0_gtxclk rtc_osc           3                       ?   /      syscon@17010000       "    starfive,jh7110-aon-syscon syscon            G                     Ç            ?   1      pinctrl@17020000              starfive,jh7110-aon-pinctrl          G                     â   /           ²   U          Ê         ß            N        ^            ?   n      power-controller@17030000             starfive,jh7110-pmu          G                     ²   o        Ç            ?   ;      csi@19800000          #    starfive,jh7110-csi2rx cdns,csi2rx           G    €               0  p   7      7      7      7   	   7   
   7         F  wsys_clk p_clk pixel_if0_clk pixel_if1_clk pixel_if2_clk pixel_if3_clk         0  â   7   	   7      7      7      7      7         5  Ñsys reg_bank pixel_if0 pixel_if1 pixel_if2 pixel_if3            ÿ   8        dphy          	   Ãdisabled            )   7           9³Ü@         ?   o   ports                               port@0           G          port@1           G      endpoint            Û   9         ?   <               clock-controller@19810000             starfive,jh7110-ispcrg           G    �                 p      3      4      5   :      1  wisp_top_core isp_top_axi noc_bus_isp_axi dvp_clk            â      )      *              3                      ë   ;            ?   7      phy@19820000              starfive,jh7110-dphy-rx          G    ‚                 p   7      7      7           wcfg ref tx          â   7      7           ë   1                        ?   8      isp@19840000              starfive,jh7110-camss             G    „             ‡                 åsyscon isp        8  p   7       7      7      7      7         3      4      E  wapb_func wrapper_clk_c dvp_inv axiwr mipi_rx0_pxl ispcore_2x isp_axi          0  â   7       7      7   
   7         )      *      6  Ñwrapper_p wrapper_c axird axiwr isp_top_n isp_top_axi           ë   ;           ²   \   W   Z   X      	   Ãdisabled            )   7       7           9óO`Í=€         ?   p   ports                               port@0           G          port@1           G      endpoint            Û   <         ?   9               clock-controller@295c0000             starfive,jh7110-voutcrg          G    )\               ,  p      :      =      >      ?      ¥   =      V  wvout_src vout_top_ahb vout_top_axi vout_top_hdmitx0_mclk i2stx0_bclk hdmitx0_pixelclk           â      +        3                      ë   ;            ?   q      pcie@940000000            starfive,jh7110-pcie              G   	@              +                  åcfg apb         ù                                     ß         8  —‚       0       0          Ã      	       	        @           ²   8        	
                     `  	                  >                     >                     >                     >            	+         Kpci         ½           	:       ÿ         p      `      
            	        wnoc tl axi_mst0 apb       0  â                                            Ñmst0 slv0 slv brg core apb           Ãokay            	D   -              ÿ   ?         default            @         ?   r   interrupt-controller                          ß             Ê         ?   >         pcie@9c0000000            starfive,jh7110-pcie              G   	À              ,                  åcfg apb         ù                                    ß         8  —‚       8       8          Ã      	€      	€       @           ²   9        	
                     `  	                  A                     A                     A                     A            	+         Kpci         ½           	:       ÿ         p      `                          wnoc tl axi_mst0 apb       0  â                                            Ñmst0 slv0 slv brg core apb           Ãokay            	D   -              ÿ   B         default            C         ?   s   interrupt-controller                          ß             Ê         ?   A            aliases         	P/soc/ethernet@16030000          	Z/soc/i2c@10030000           	_/soc/i2c@10050000           	d/soc/i2c@12050000           	i/soc/i2c@12060000           	n/soc/mmc@16010000           	s/soc/mmc@16020000           	x/soc/serial@10000000            	€/soc/ethernet@16040000        chosen          	Šserial0:115200n8          memory@40000000          Kmemory           G    @                gpio-restart              gpio-restart               -   #            §   à      audio-codec           linux,spdif-dit         œ             ?   F      sound             simple-audio-card           	–StarFive-PWMDAC-Sound-Card                              simple-audio-card,dai-link@0             G            	­left_j          	´   D        	Ä   D   cpu         	Ñ   E         ?   D      codec           	Ñ   F            __symbols__         	Û/cpus           	à/cpus/cpu@0       !  	å/cpus/cpu@0/interrupt-controller            	ï/cpus/cpu@1       !  	õ/cpus/cpu@1/interrupt-controller            	ÿ/cpus/cpu@2       !  
/cpus/cpu@2/interrupt-controller            
/cpus/cpu@3       !  
/cpus/cpu@3/interrupt-controller            
/cpus/cpu@4       !  
%/cpus/cpu@4/interrupt-controller            
//opp-table-0          ,  
7/thermal-zones/cpu-thermal/trips/cpu-alert0         
B/dvp-clock          
J/gmac0-rgmii-rxin-clock         
[/gmac0-rmii-refin-clock         
l/gmac1-rgmii-rxin-clock         
}/gmac1-rmii-refin-clock         
Ž/hdmitx0-pixel-clock            
Ÿ/i2srx-bclk-ext-clock           
®/i2srx-lrck-ext-clock           
½/i2stx-bclk-ext-clock           
Ì/i2stx-lrck-ext-clock           
Û/mclk-ext-clock         
ä/oscillator         
è/rtc-oscillator         
ð/stmmac-axi-config          /tdm-ext-clock          	/soc/timer@2000000          /soc/cache-controller@2010000         "  /soc/interrupt-controller@c000000           /soc/serial@10000000            !/soc/serial@10010000            '/soc/serial@10020000            	Z/soc/i2c@10030000           -/soc/i2c@10040000           	_/soc/i2c@10050000           2/soc/spi@10060000           7/soc/spi@10060000/spi@0         @/soc/spi@10070000           E/soc/spi@10080000           J/soc/tdm@10090000           N/soc/i2s@100e0000           T/soc/pwmdac@100b0000            [/soc/usb@10100000           `/soc/usb@10100000/usb@0         j/soc/phy@10200000           r/soc/phy@10210000           {/soc/phy@10220000           „/soc/clock-controller@10230000          ‹/soc/syscon@10240000            –/soc/serial@12000000            œ/soc/serial@12010000            ¢/soc/serial@12020000            ¨/soc/i2c@12030000           ­/soc/i2c@12040000           	d/soc/i2c@12050000           ²/soc/i2c@12050000/pmic@36         +  »/soc/i2c@12050000/pmic@36/regulators/dcdc1        +  Ã/soc/i2c@12050000/pmic@36/regulators/dcdc2        +  Ë/soc/i2c@12050000/pmic@36/regulators/aldo4          	i/soc/i2c@12060000           Ô/soc/spi@12070000           Ù/soc/spi@12080000           Þ/soc/spi@12090000           ã/soc/spi@120a0000           è/soc/i2s@120b0000           ï/soc/i2s@120c0000           ö/soc/pwm@120d0000         !  ú/soc/temperature-sensor@120e0000            /soc/spi@13010000           /soc/spi@13010000/flash@0           /soc/clock-controller@13020000          /soc/syscon@13030000          &  #/soc/syscon@13030000/clock-controller           */soc/pinctrl@13040000           2/soc/pinctrl@13040000/i2c0-0            </soc/pinctrl@13040000/i2c2-0            F/soc/pinctrl@13040000/i2c5-0            P/soc/pinctrl@13040000/i2c6-0            Z/soc/pinctrl@13040000/mmc0-0            d/soc/pinctrl@13040000/mmc1-0            n/soc/pinctrl@13040000/pcie0-0           y/soc/pinctrl@13040000/pcie1-0           „/soc/pinctrl@13040000/pwmdac-0          �/soc/pinctrl@13040000/pwm-0         ™/soc/pinctrl@13040000/spi0-0            £/soc/pinctrl@13040000/uart0-0           ®/soc/crypto@16000000            µ/soc/dma-controller@16008000            º/soc/rng@1600c000           	n/soc/mmc@16010000           	s/soc/mmc@16020000           ¾/soc/ethernet@16030000        +  m/soc/ethernet@16030000/mdio/ethernet-phy@0          Ä/soc/ethernet@16040000        +  /soc/ethernet@16040000/mdio/ethernet-phy@1          ¶/soc/dma-controller@16050000            Ê/soc/clock-controller@17000000          Ñ/soc/syscon@17010000            Ü/soc/pinctrl@17020000           ä/soc/power-controller@17030000          é/soc/csi@19800000         (  ð/soc/csi@19800000/ports/port@1/endpoint          /soc/clock-controller@19810000          /soc/phy@19820000           ú/soc/isp@19840000         (  /soc/isp@19840000/ports/port@1/endpoint         !/soc/clock-controller@295c0000          )/soc/pcie@940000000       )  //soc/pcie@940000000/interrupt-controller            :/soc/pcie@9c0000000       )  @/soc/pcie@9c0000000/interrupt-controller            K/audio-codec          (  X/sound/simple-audio-card,dai-link@0/cpu          	compatible #address-cells #size-cells model timebase-frequency phandle reg device_type i-cache-block-size i-cache-sets i-cache-size next-level-cache riscv,isa riscv,isa-base riscv,isa-extensions status interrupt-controller #interrupt-cells d-cache-block-size d-cache-sets d-cache-size d-tlb-sets d-tlb-size i-tlb-sets i-tlb-size mmu-type tlb-split operating-points-v2 clocks clock-names #cooling-cells cpu-supply cpu opp-shared opp-hz opp-microvolt polling-delay-passive polling-delay thermal-sensors trip cooling-device temperature hysteresis clock-output-names #clock-cells clock-frequency snps,lpi_en snps,wr_osr_lmt snps,rd_osr_lmt snps,blen interrupt-parent ranges interrupts-extended interrupts cache-level cache-unified riscv,ndev resets reg-io-width reg-shift pinctrl-names pinctrl-0 i2c-sda-hold-time-ns i2c-sda-falling-time-ns i2c-scl-falling-time-ns arm,primecell-periphid num-cs spi-max-frequency dmas dma-names #sound-dai-cells starfive,syscon starfive,stg-syscon reset-names dr_mode reg-names interrupt-names phys phy-names #phy-cells #reset-cells regulator-boot-on regulator-always-on regulator-min-microvolt regulator-max-microvolt regulator-name #pwm-cells #thermal-sensor-cells cdns,fifo-depth cdns,fifo-width cdns,trigger-address cdns,read-delay cdns,tshsl-ns cdns,tsd2d-ns cdns,tchsh-ns cdns,tslch-ns assigned-clocks assigned-clock-rates gpio-controller #gpio-cells pinmux bias-disable input-enable input-schmitt-enable bias-pull-up drive-strength input-disable input-schmitt-disable slew-rate bias-pull-down lli-bus-interface-ahb1 mem-bus-interface-ahb1 memcpy-burst-size memcpy-bus-width #dma-cells fifo-watermark-aligned data-addr starfive,sysreg cap-mmc-highspeed mmc-ddr-1_8v mmc-hs200-1_8v cap-mmc-hw-reset post-power-on-delay-ms vmmc-supply vqmmc-supply non-removable no-sdio no-mmc cd-gpios disable-wp cap-sd-highspeed rx-fifo-depth tx-fifo-depth snps,multicast-filter-bins snps,perfect-filter-entries snps,fixed-burst snps,no-pbl-x8 snps,force_thresh_dma_mode snps,axi-config snps,tso snps,en-tx-lpi-clockgating snps,txpbl snps,rxpbl phy-handle phy-mode rx-internal-delay-ps tx-internal-delay-ps assigned-clock-parents dma-channels snps,dma-masters snps,data-width snps,block-size snps,priority snps,axi-max-burst-len #power-domain-cells remote-endpoint power-domains linux,pci-domain interrupt-map-mask interrupt-map msi-controller bus-range perst-gpios ethernet0 i2c0 i2c2 i2c5 i2c6 mmc0 mmc1 serial0 ethernet1 stdout-path simple-audio-card,name format bitclock-master frame-master sound-dai cpus S7_0 cpu0_intc U74_1 cpu1_intc U74_2 cpu2_intc U74_3 cpu3_intc U74_4 cpu4_intc cpu_opp cpu_alert0 dvp_clk gmac0_rgmii_rxin gmac0_rmii_refin gmac1_rgmii_rxin gmac1_rmii_refin hdmitx0_pixelclk i2srx_bclk_ext i2srx_lrck_ext i2stx_bclk_ext i2stx_lrck_ext mclk_ext osc rtc_osc stmmac_axi_setup tdm_ext clint ccache plic uart0 uart1 uart2 i2c1 spi0 spi_dev0 spi1 spi2 tdm i2srx pwmdac usb0 usb_cdns3 usbphy0 pciephy0 pciephy1 stgcrg stg_syscon uart3 uart4 uart5 i2c3 i2c4 axp15060 vcc_3v3 vdd_cpu emmc_vdd spi3 spi4 spi5 spi6 i2stx0 i2stx1 pwm sfctemp qspi nor_flash syscrg sys_syscon pllclk sysgpio i2c0_pins i2c2_pins i2c5_pins i2c6_pins mmc0_pins mmc1_pins pcie0_pins pcie1_pins pwmdac_pins pwm_pins spi0_pins uart0_pins crypto sdma rng gmac0 gmac1 aoncrg aon_syscon aongpio pwrc csi2rx csi2rx_to_camss ispcrg csi_phy camss_from_csi2rx voutcrg pcie0 pcie_intc0 pcie1 pcie_intc1 pwmdac_codec sndcpu0 