Ðþí  ,R   8  (ä   (            n  (¬                             9    sipeed,lichee-pi-4a sipeed,lichee-module-4a thead,th1520                                     &Sipeed Lichee Pi 4A    cpus                                      , -ÆÀ   cpu@0             thead,c910 riscv             ?cpu          Krv64imafdc           Urv64i         (   di m a f d c zicntr zicsr zifencei zihpm          y             }   @         �            �            ª   @         ½            Ê            ×            èriscv,sv39     interrupt-controller              riscv,cpu-intc            ñ                               cpu@1             thead,c910 riscv             ?cpu          Krv64imafdc           Urv64i         (   di m a f d c zicntr zicsr zifencei zihpm          y            }   @         �            �            ª   @         ½            Ê            ×            èriscv,sv39     interrupt-controller              riscv,cpu-intc            ñ                               cpu@2             thead,c910 riscv             ?cpu          Krv64imafdc           Urv64i         (   di m a f d c zicntr zicsr zifencei zihpm          y            }   @         �            �            ª   @         ½            Ê            ×            èriscv,sv39     interrupt-controller              riscv,cpu-intc            ñ                               cpu@3             thead,c910 riscv             ?cpu          Krv64imafdc           Urv64i         (   di m a f d c zicntr zicsr zifencei zihpm          y            }   @         �            �            ª   @         ½            Ê            ×            èriscv,sv39     interrupt-controller              riscv,cpu-intc            ñ                               l2-cache              cache               @                    ’            Ÿ            +                    pmu       
    riscv,pmu         À  9       ÿø       ÿø       ÿø       ÿø       ÿø       ÿø   	   	 ÿø   
   
 ÿø       ÿø     ÿø     ÿø     ÿø     ÿø     ÿø     ÿø     ÿø      À  U                                                            	   	       
   
                                                                                     H  n       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       	ÿÿÿÿÿÿÿÿ ÿø       
ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø       ÿÿÿÿÿÿÿÿ ÿø        ÿÿÿÿÿÿÿÿ ÿø       !ÿÿÿÿÿÿÿÿ ÿø       "ÿÿÿÿÿÿÿÿ ÿø       #ÿÿÿÿÿÿÿÿ ÿø       $ÿÿÿÿÿÿÿÿ ÿø       %ÿÿÿÿÿÿÿÿ ÿø       &ÿÿÿÿÿÿÿÿ ÿø       'ÿÿÿÿÿÿÿÿ ÿø       (ÿÿÿÿÿÿÿÿ ÿø       )ÿÿÿÿÿÿÿÿ ÿø       *ÿÿÿÿÿÿÿÿ ÿø      oscillator            fixed-clock         Žosc_24m         ¡            ®n6                  32k-oscillator            fixed-clock         Žosc_32k         ¡            ®  €       soc           simple-bus          ¾                                    Ï         ß   interrupt-controller@ffd8000000       "    thead,th1520-plic thead,c900-plic            y   ÿØ                @  æ            	            	            	            	          ñ                                ú   ð                 timer@ffdc000000          $    thead,th1520-clint thead,c900-clint          y   ÿÜ                @  æ                                                      spi@ffe700c000        !    thead,th1520-spi snps,dw-apb-ssi             y   ÿç À                   6                 6                                 okay          serial@ffe7014000             snps,dw-apb-uart             y   ÿç@                   $                 U      7        baudclk apb_pclk            *           4           okay          mmc@ffe7080000            thead,th1520-dwcmshc             y   ÿç                    >                 +        core            okay            A           KÍ=€         Y         h         v         ~      mmc@ffe7090000            thead,th1520-dwcmshc             y   ÿç	                    @                 +        core            okay            A           KÍ=€      mmc@ffe70a0000            thead,th1520-dwcmshc             y   ÿç
                    G                 +        core          	  disabled          serial@ffe7f00000             snps,dw-apb-uart             y   ÿçð                    %                 U      8        baudclk apb_pclk            *           4         	  disabled          serial@ffe7f04000             snps,dw-apb-uart             y   ÿçð@                   '                 U      :        baudclk apb_pclk            *           4         	  disabled          gpio@ffe7f34000           snps,dw-apb-gpio             y   ÿçó@                                               ?   gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      :            gpio@ffe7f38000           snps,dw-apb-gpio             y   ÿçó€                                               1   gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      ;            gpio@ffec005000           snps,dw-apb-gpio             y   ÿì P                                               =   gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      8            gpio@ffec006000           snps,dw-apb-gpio             y   ÿì `                                               >   gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      9            serial@ffec010000             snps,dw-apb-uart             y   ÿì        @            &                 U      9        baudclk apb_pclk            *           4         	  disabled          clock-controller@ffef010000           thead,th1520-clk-ap          y   ÿï                            ¡                    dma-controller@ffefc00000             snps,axi-dma-1.01a           y   ÿïÀ                                                   core-clk cfgr-clk           §           ²           ¿                    Ï                     Ý           î           þ           okay          timer@ffefc32000              snps,dw-apb-timer            y   ÿïÃ                               timer                       	  disabled          timer@ffefc32014              snps,dw-apb-timer            y   ÿïÃ                              timer                       	  disabled          timer@ffefc32028              snps,dw-apb-timer            y   ÿïÃ (                             timer                       	  disabled          timer@ffefc3203c              snps,dw-apb-timer            y   ÿïÃ <                             timer                       	  disabled          serial@fff7f08000             snps,dw-apb-uart             y   ÿ÷ð€       @            (                 U      ;        baudclk apb_pclk            *           4         	  disabled          serial@fff7f0c000             snps,dw-apb-uart             y   ÿ÷ðÀ       @            )                 U      <        baudclk apb_pclk            *           4         	  disabled          timer@ffffc33000              snps,dw-apb-timer            y   ÿÿÃ0                              timer                       	  disabled          timer@ffffc33014              snps,dw-apb-timer            y   ÿÿÃ0                             timer                       	  disabled          timer@ffffc33028              snps,dw-apb-timer            y   ÿÿÃ0(                             timer                       	  disabled          timer@ffffc3303c              snps,dw-apb-timer            y   ÿÿÃ0<                             timer                       	  disabled          gpio@fffff41000           snps,dw-apb-gpio             y   ÿÿô                                    gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      L            gpio@fffff52000           snps,dw-apb-gpio             y   ÿÿõ                                     gpio-controller@0             snps,dw-apb-gpio-port            „        ”                         y              ñ                      7               memory@0             ?memory           y                     aliases         /soc/gpio@ffec005000            /soc/gpio@ffec006000            !/soc/gpio@ffe7f34000            '/soc/gpio@ffe7f38000            -/soc/serial@ffe7014000          5/soc/serial@ffe7f00000          =/soc/serial@ffec010000          E/soc/serial@ffe7f04000          M/soc/serial@fff7f08000          U/soc/serial@fff7f0c000          ]/soc/spi@ffe700c000       chosen          bserial0:115200n8             	compatible #address-cells #size-cells model timebase-frequency device_type riscv,isa riscv,isa-base riscv,isa-extensions reg i-cache-block-size i-cache-size i-cache-sets d-cache-block-size d-cache-size d-cache-sets next-level-cache mmu-type interrupt-controller #interrupt-cells phandle cache-level cache-unified riscv,event-to-mhpmcounters riscv,event-to-mhpmevent riscv,raw-event-to-mhpmcounters clock-output-names #clock-cells clock-frequency interrupt-parent dma-noncoherent ranges interrupts-extended riscv,ndev interrupts clocks status clock-names reg-shift reg-io-width bus-width max-frequency mmc-hs400-1_8v non-removable no-sdio no-sd gpio-controller #gpio-cells ngpios #dma-cells dma-channels snps,block-size snps,priority snps,dma-masters snps,data-width snps,axi-max-burst-len gpio0 gpio1 gpio2 gpio3 serial0 serial1 serial2 serial3 serial4 serial5 spi0 stdout-path 